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AM79C988 데이터시트(PDF) 8 Page - Advanced Micro Devices

부품명 AM79C988
상세설명  Quad Integrated Ethernet Transceiver (QuIET??
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제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C988 데이터시트(HTML) 8 Page - Advanced Micro Devices

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Am79C988A
PRELIMINARY
FUNCTIONAL DESCRIPTION
Overview
The Am79C988A Quad Integrated Ethernet Transceiver
(QuIET) device consists of four independent 10BASE-T
transceivers which are compliant with the IEEE 802.3 Sec-
tion 14 (
Medium Attachment Unit for 10BASE-T Cabling)
standard. The QuIET device includes on-chip filtering for
both transmit and receive functions, thus eliminating the
need for external filters. It provides automatic polarity
detection and correction and can operate in either normal
or full-duplex mode.
The QuIET device interfaces directly with the Pseudo
AUI (PAUI) ports on the IMR2 (Am79C983A) device.
PAUI ports are functionally equivalent to the AUI inter-
face as described in IEEE 802.3 Section 7, but are
single-ended and do not have the drive capability
specified in the standard. The QuIET device can also
be connected to standard AUI ports. Command and
status data is exchanged with the IMR2 device via a
serial management interface.
Twisted Pair Transmitters
Each TXD port is a differential twisted pair driver. When
properly terminated, TXD meets the 10BASE-T trans-
mitter electrical requirements as specified in IEEE 802.3
Section 14.3.1.2. Proper termination, Figure 1, consists
of a single 110 ohm +1% resistor across TXD+ and TXD-
and a 1:1 standard Ethernet transformer. A common
mode may be required for EMI considerations. An ex-
ternal capacitor is not required. The load is a twisted
pair cable that meets IEEE 802.3, Section 14.4 require-
ments. The cable is terminated at the other end by a
100 ohm load.
The TXD signal is filtered on the chip to reduce harmonic
content per IEEE 802.3 Section 14.3.2.1 (10BASE-T).
Since filtering is performed by the QuIET device, the
TXD signal can be connected directly to a standard
transformer. External filter modules are not required.
Figure 1. TXD Termination
Twisted Pair Receivers
Each RXD port is a differential twisted-pair receiver.
When properly terminated, RXD ports will meet the elec-
trical requirements for 10BASE-T receivers as specified
in IEEE 802.3, Section 14.3.1.3. Proper termination is
shown in Figure 2. Each receiver has internal filtering and
does not require external filter modules.
Figure 2. RXD Termination
Receive squelch threshold voltage can be programmed
for extended distance mode. In this mode, the differential
receive threshold is reduced to allow cable lengths greater
than the 100 meters specified in the IEEE 802.3 Standard.
Polarity Detection and Reversal
The receive function includes the ability to invert the po-
larity of the signals appearing at the RXD+ pair if the
polarity of the received signal is reversed (such as in the
case of a wiring error). The polarity detection function is
activated following Reset or Link Fail, and will reverse the
receive polarity based on both the polarity of any previous
Link Test Pulses and the polarity of subsequent packets
with a valid End Transmit Delimiter (ETD).
When in the Link Fail State, the QuIET device will recog-
nize Link Test Pulses of either positive or negative polar-
ity. Exit from the Link Fail state is caused by the reception
of five-to-seven consecutive Link Test Pulses of identical
polarity. Both Link Test Pulses and packets are used to
determine the initial receive polarity. Once correct polarity
is established, the receiver subsequently accepts only
Link Test Pulses that are recognized as TRUE rather than
inverted.
The Link Test pulse follows the template of Figure
14-12 of the IEEE 802.3 10BASE-T standard.
Link Test Function
The Link Test function is implemented as specified in
the IEEE 802.3 10BASE-T standard. A Link Test pulse
is transmitted if a port has been idle for a period of more
than approximately 16 (+/-8) milliseconds (ms).
The QuIET device monitors the 10BASE-T ports for
packet and Link Pulse activity. If neither a packet nor a
Link Test pulse is received for 79 ms to 102 ms, the port
will enter the Link Test Fail State and the QuIET device
will inhibit the transmit and receive functions for that
port. Link pulses are transmitted when idle conditions
are met. When a packet or five-to-seven consecutive
Link Test pulses is received, the port exits the Link Fail
State and transmit/receive functions are restored.
19880B-5
TXD+
TXD-
110
1:1
Twisted Pair
100
RXD+
RXD-
1:1
Twisted Pair
100
100
19880B-6


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