전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

SN74AC74NE4 데이터시트(PDF) 3 Page - Texas Instruments

Click here to check the latest version.
부품명 SN74AC74NE4
상세설명  DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
Download  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

SN74AC74NE4 데이터시트(HTML) 3 Page - Texas Instruments

  SN74AC74NE4 Datasheet HTML 1Page - Texas Instruments SN74AC74NE4 Datasheet HTML 2Page - Texas Instruments SN74AC74NE4 Datasheet HTML 3Page - Texas Instruments SN74AC74NE4 Datasheet HTML 4Page - Texas Instruments SN74AC74NE4 Datasheet HTML 5Page - Texas Instruments SN74AC74NE4 Datasheet HTML 6Page - Texas Instruments SN74AC74NE4 Datasheet HTML 7Page - Texas Instruments SN74AC74NE4 Datasheet HTML 8Page - Texas Instruments SN74AC74NE4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 23 page
background image
SN54AC74, SN74AC74
DUAL POSITIVEEDGETRIGGERED DTYPE FLIPFLOPS
WITH CLEAR AND PRESET
SCAS521F − AUGUST 1995 − REVISED OCTOBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
−0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1)
−0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): D package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
96
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
80
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
76
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
113
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54AC74
SN74AC74
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
6
2
6
V
VCC = 3 V
2.1
2.1
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VIH
High-level input voltage
VCC = 5.5 V
3.85
3.85
V
VCC = 3 V
0.9
0.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VIL
Low-level input voltage
VCC = 5.5 V
1.65
1.65
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 3 V
−12
−12
IOH
High-level output current
VCC = 4.5 V
−24
−24
mA
IOH
High-level output current
VCC = 5.5 V
−24
−24
mA
VCC = 3 V
12
12
IOL
Low-level output current
VCC = 4.5 V
24
24
mA
IOL
Low-level output current
VCC = 5.5 V
24
24
mA
∆t/∆v
Input transition rise or fall rate
8
8
ns/V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


유사한 부품 번호 - SN74AC74NE4

제조업체부품명데이터시트상세설명
logo
Texas Instruments
SN74AC74NE4 TI-SN74AC74NE4 Datasheet
542Kb / 17P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AC74NE4 TI1-SN74AC74NE4 Datasheet
1Mb / 22P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
More results

유사한 설명 - SN74AC74NE4

제조업체부품명데이터시트상세설명
logo
Texas Instruments
CD54AC74 TI-CD54AC74 Datasheet
330Kb / 6P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AHC74 TI-SN54AHC74 Datasheet
105Kb / 19P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54HC74 TI-SN54HC74 Datasheet
96Kb / 16P
[Old version datasheet]   DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
logo
Hitachi Semiconductor
HD74HCT74A HITACHI-HD74HCT74A Datasheet
57Kb / 10P
   Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
logo
Potato Semiconductor Co...
PO54G74A POTATO-PO54G74A Datasheet
563Kb / 6P
   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
logo
Texas Instruments
SN5474 TI1-SN5474_15 Datasheet
1Mb / 23P
[Old version datasheet]   DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN54AHC74 TI1-SN54AHC74_15 Datasheet
1Mb / 27P
[Old version datasheet]   Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset
SN54AHC74 TI-SN54AHC74_06 Datasheet
891Kb / 21P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74LS74ADRG4 TI-SN74LS74ADRG4 Datasheet
1Mb / 21P
[Old version datasheet]   DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR
SN54ACT74 TI-SN54ACT74 Datasheet
86Kb / 6P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
logo
Hitachi Semiconductor
HD74LS74A HITACHI-HD74LS74A Datasheet
69Kb / 6P
   Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear)
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com