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CDC341DWG4 데이터시트(PDF) 5 Page - Texas Instruments |
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CDC341DWG4 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 10 page CDC341 1-LINE TO 8-LINE CLOCK DRIVER SCAS333D – DECEMBER 1992 – REVISED OCTOBER 1998 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT 500 Ω tPLH tPHL 1.5 V 1.5 V 3 V 0 V 1.5 V 1.5 V VOH VOL 2 V 0.8 V 0.8 V tf tr Input (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Output NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. Figure 1. Load Circuit and Voltage Waveforms A 1G 1Yn tPLH1 tPHL1 2Yn tPLH2 tPHL2 2G NOTES: A. Output skew, tsk(o), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2) – The difference between the fastest and slowest of tPHLn (n = 1, 2) B. Pulse skew, tsk(p), is calculated as the greater of | tPLHn – tPHLn | (n = 1, 2). C. Process skew, tsk(pr), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2) across multiple devices under identical operating conditions – The difference between the fastest and slowest of tPHLn (n = 1, 2) across multiple devices under identical operating conditions Figure 2. Waveforms for Calculation of tsk(o), tsk(p), tsk(pr) |
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