ATmega603(L) and ATmega103(L)

4

first access cycle, and the AD0-7 pins are used for data

during the second access cycle.

AV

CC

This is the supply voltage to the A/D Converter. It should be

page 53 for details on operation of the ADC.

AREF

This is the analog reference input for the ADC converter.

For ADC operations, a voltage in the range AGND to AVCC

must be applied to this pin.

AGND

If the board has a separate analog ground plane, this pin

should be connected to this ground plane. Otherwise, con-

nect to GND.

PEN

This is a programming enable pin for the low-voltage serial

programming mode. By holding this pin low during a power-

on reset, the device will enter the serial programming

mode.

Crystal Oscillator

XTAL1 and XTAL2 are input and output, respectively, of an

inverting amplifier which can be configured for use as an

on-chip oscillator, as shown in Figure 2. Either a quartz

crystal or a ceramic resonator may be used. To drive the

device from an external clock source, XTAL2 should be left

unconnected while XTAL1 is driven as shown in Figure 3.

For the Timer Oscillator pins, OSC1 and OSC2, the crystal

is connected directly between the pins. No external capaci-

tors are needed. The oscillator is optimized for use with a

32,768Hz watch crystal. An external clock signal applied to

this pin goes through the same amplifier having a band-

width of 256kHz. The external clock signal should therefore

be in the interval 0Hz - 256kHz.

Figure 2. Oscillator Connections

Figure 3. External Clock Drive Configuration

ATmega603/103 Architectural Overview

The fast-access register file contains 32 x 8-bit general pur-

pose working registers with a single clock cycle access

time. This means that during one single clock cycle, one

ALU (Arithmetic Logic Unit) operation is executed. Two

operands are output from the register file, the operation is

executed, and the result is stored back in the register file -

in one clock cycle.

Six of the 32 registers can be used as three 16-bit indirect

address register pointers for Data Space addressing -

enabling efficient address calculations. One of the three

address pointers is also used as the address pointer for the

constant table look up function. These added function reg-

isters are the 16-bit X-register, Y-register and Z-register.

The ALU supports arithmetic and logic functions between

registers or between a constant and a register. Single reg-

ister operations are also executed in the ALU. Figure 4

shows the ATmega603/103 AVR Enhanced RISC micro-

controller architecture.

In addition to the register operation, the conventional mem-

ory addressing modes can be used on the register file as

well. This is enabled by the fact that the register file is

assigned the 32 lowermost Data Space addresses, allow-

ing them to be accessed as though they were ordinary

memory locations.

The I/O memory space contains 64 addresses for CPU

peripheral functions as Control Registers, Timer/Counters,

A/D-converters, and other I/O functions. The I/O Memory

can be accessed directly, or as the Data Space locations

following those of the register file, $20 - $5F.

C2

XTAL2

GND

XTAL1

C1

XTAL2

XTAL1

GND

NC

EXTERNAL

OSCILLATOR

SIGNAL