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UC3834DWG4 데이터시트(PDF) 5 Page - Texas Instruments |
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UC3834DWG4 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 12 page UC1834 UC2834 UC3834 Both the current sense and error amplifiers on the UC1834 are transconductance type amplifiers. As a result, their volt- age gain is a direct function of the load impedance at their shared output pin, Pin 14. Their small signal voltage gain as a function of load and frequency is nominally given by; AV E ⁄ A = ZL (f) 700 Ω and AV C. S. ⁄ A = ZL (f) 70 Ω for: f ≤ 500kHz and |ZL(f)| ≤ 1 MΩ Where: AV=Small Signal Voltage Gain to pin 14. ZL(f) = Load Impedance at Pin 14. The UC1834 fault delay circuitry prevents the fault outputs from responding to transient fault conditions. The delay reset latch insures that the full, user defined, delay passes before an over-voltage fault response occurs. This prevents unnecessary crowbar, or latched-off conditions, from occurring following sharp under-voltage to over-voltage transients. The crowbar output on the UC1834 is activated following a sustained over-voltage condition. The crowbar output remains high as long as the fault condition persists, or, as long as the over-voltage latch is set. The latch is set with an over-voltage fault if the voltage at Pin 15 is above the latch reset threshold, typically 0.4V. When the latch is set, its Q − output will pull Pin 15 low through a series diode. As long as a nominal pull-up load exists, the series diode prevents Q − from pulling Pin 15 below the reset threshold. However, Pin 15 is pulled low enough to disable the driver outputs if Pins 15 and 14 are tied together. With Pin 15 and 14 common, the regulator will latch off in response to an over-voltage fault. If the fault condition is cleared and Pins 14 and 15 are momen- tarily pulled below the latch reset threshold, the driver out- puts are re-enabled. APPLICATION INFORMATION Foldback Current Limiting Setting the Threshold Adjust Voltage (VADJ) 5 |
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