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CS51313 데이터시트(PDF) 2 Page - Cherry Semiconductor Corporation

부품명 CS51313
상세설명  Synchronous CPU Buck Controller Capable of Implementing Multiple Linear Regulators
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제조업체  CHERRY [Cherry Semiconductor Corporation]
홈페이지  http://www.cherrycorp.com/
Logo CHERRY - Cherry Semiconductor Corporation

CS51313 데이터시트(HTML) 2 Page - Cherry Semiconductor Corporation

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Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
Absolute Maximum Ratings
Pin Symbol
Pin Name
VMAX
VMIN
ISOURCE
ISINK
VREF
Bandgap Reference Voltage
6V
-0.3V
1mA
1mA
VCC
IC Power Input
16V
-0.3V
N/A
1.5A Peak
200mA DC
COMP
Compensation Pin
6V
-0.3V
1mA
5mA
VFB, VOUT, VID0-4
Voltage Feedback Input, Output
6V
-0.3V
1mA
1mA
Voltage Sense Pin, Voltage
ID DAC Inputs
COFF
Off-Time Pin
6V
-0.3V
1mA
50mA
GATE(H), GATE(L)
High-Side, Low Side FET Drivers
16V
-0.3V
1.5APeak
1.5A Peak
200mA DC 200mA DC
PWRGD
Power-Good Output
6V
-0.3V
1mA
30mA
OVP
Overvoltage Protection
15V
-0.3V
30mA
1mA
Gnd
Ground
0V
0V
1.5A Peak
N/A
200mA DC
1,2,3,4,6
VIDO – VID4
Voltage ID DAC inputs. These pins are internally pulled up to
5.65V if left open. VID4 selects the DAC range. When VID4 is
high (logic one), the Error Amp reference range is 2.125V to
3.525V with 100mV increments. When VID4 is low (logic zero),
the Error amp reference voltage is 1.325V to 2.075V with 50mV
increments.
9VCC
Input power supply pin for the internal circuitry.
Decouple with filter capacitor to Gnd.
10
GATE(H)
High side switch FET driver pin
11
Gnd
Ground pin.
12
GATE(L)
Low side synchronous FET driver pin.
14
PWRGD
Power-Good Output. Open collector output drives low when
VFB is out of regulation.
16
COMP
Error amp output. PWM comparator inverting input.
A capacitor to Gnd provides error amp compensation.
15
COFF
Off-Time Capacitor Pin. A capacitor from this pin to Gnd sets
the off time for the regulator
8VOUT
Current limit comparator inverting input.
7VFB
Error amp inverting input, PWM comparator non-inverting
input, current limit comparator non-inverting input, PWRGD
and OVP comparator input.
5VREF
Bandgap Reference Voltage. It can be used to generate other
regulated output voltages.
13
OVP
Overvoltage protection pin. Goes high when overvoltage
condition is detected on VFB.
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature Soldering
Reflow (SMD styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 sec. max above 183°C, 230°C peak
Storage Temperature Range, TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65° to 150°C
ESD Susceptibility (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV


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