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CS8101YDWFR20 데이터시트(PDF) 4 Page - Cherry Semiconductor Corporation |
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CS8101YDWFR20 데이터시트(HTML) 4 Page - Cherry Semiconductor Corporation |
4 / 8 page Figure 3. RC Network for Delay An external RC network on the lead (Figure 3) pro- vides a sufficiently long delay for most microprocessor based applications. RC values can be chosen using the following formula: ÐtDelay RTOTCRST = [ln ] where: RRST = Delay resistor RIN = µP port impedance RTOT = RRST in parallel with RIN CRST = Delay capacitor tDelay = desired delay time VRST = VSAT of lead (0.7V @ turn - ON) VT = threshold RESET RESET RESET RESET ) VT Ð VOUT VRST Ð VOUT ( RESET RESET RESET CS8101 VOUT CRST RRST COUT 5V to mP and System Power to mP RESET Port The circuit depicted in Figure 4 lets the microprocessor control its power source, the CS8101 regulator. An I/O port on the µP and the SWITCH port are used to drive the base of Q1. When Q1 is driven into saturation, the voltage on the lead falls below its lower threshold. The regulatorÕs output is enabled. When the drive current is removed, the voltage on the lead rises, the out- put is switched off and the IC moves into Sleep mode where it draws 50µA (max). By coupling these two controls with the lead, the system has added flexibility. Once the system is running, the state of the SWITCH is irrelevant as long as the I/O port continues to drive Q1. The microprocessor can turn off its own power by withdrawing drive current, once the SWITCH is open. This software control at the I/O port allows the microprocessor to finish key housekeeping functions before power is removed. The logic options are summarized in Table 1. ENABLE ENABLE ENABLE 4 Applications Notes Circuit Description: continued 0.1 mF VIN Gnd CS8101 VOUT 500k W Q1 500k W 100k W 100k W CRST RRST COUT VCC I/O Port mP SWITCH VBAT RESET ENABLE RESET Figure 4. Microprocessor Control of CS8101 using external switching transistor Q1. |
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