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CS4215-KL 데이터시트(PDF) 9 Page - Cirrus Logic |
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CS4215-KL 데이터시트(HTML) 9 Page - Cirrus Logic |
9 / 52 page 1 Vrms. The CMOUT reference level is used to level shift the signal. This level shifting allows the line inputs to be DC coupled into the CS4215. Minimum ADC offset results when the line inputs are DC coupled (see Analog Charac- teristics Table). Figure 3 shows an AC coupled input circuit for signals centered around 0 Volts. The anti-alias- ing RC filter presents a low impedance at high frequencies and should be driven by a low im- pedance source. Microphone Level Inputs Internal amplifiers with a programmable 20 dB gain block are provided for the microphone level inputs, MINR and MINL. Figure 4 shows a sin- gle-ended input microphone pre-amplifier stage with a gain of 23 dB. AC coupling is mandatory for these inputs since any DC offset on the input will be amplified by the codec. The 20 dB gain block may be disabled using the MLB bit in Control Time Slot 1. When dis- abled, the inputs become line level with full scale inputs of 1 Vrms. Adjustable Input Gain The signals from the microphone or the line in- puts are routed to a programmable gain circuit which provides up to 22.5 dB of gain in 1.5 dB steps. Level changes only take effect on zero crossings to minimize audible artifacts, often re- ferred to as "zipper noise". The requested level change is forced if no zero crossing is found af- ter 511 frames (10.6 ms at a 48 kHz frame rate). A separate zero crossing detector exists for each channel. Analog Outputs The analog outputs of the DACs are routed via an attenuator to a pair of line outputs, a pair of MINR 1 uF C6 + C5 2 3 VA+ 8 0.1 uF C4 560 pF 10 uF + R6 2.2 k R4 22.1 k 4 1 uF + R5 50 k MINL 1 uF + C2 6 5 C1 560 pF R3 2.2 k R1 22.1 k 150 10 uF + R2 50 k NPO NPO C3 CMOUT C47 C8 1 7 R57 (Mono) U2 MC33078 or C7 C46 MC33178 A =20 dB 0.47 uF C48 0.01 uF NPO 150 R56 0.01 uF NPO Microphone Input Left (pin 17) Microphone Input Right (pin 15) 0.47 uF C45 Figure 4. Optional Microphone Input Buffer CS4215 DS76F2 9 |
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