t

buf

t

hdst

t

hdst

t

low

t r

t f

t

hdd

t

high

t sud

t sust

t susp

Stop

Start

Start

Stop

Repeated

SDA

SCL

t

irs

RST

SWITCHING CHARACTERISTICS - CONTROL PORT

Parameter

Symbol

Min

Max

Units

I

(Note 12)

SCL Clock Frequency

-

100

kHz

RST Rising Edge to Start

500

-

ns

Bus Free Time Between Transmissions

4.7

-

µs

Start Condition Hold Time (prior to first clock pulse)

4.0

-

µs

Clock Low Time

4.7

-

µs

Clock High Time

4.0

-

µs

Setup Time for Repeated Start Condition

4.7

-

µs

SDA Hold Time from SCL Falling

(Note 13)

0-

µs

SDA Setup Time to SCL Rising

250

-

ns

Rise Time of Both SDA and SCL Lines

-1

µs

Fall Time of Both SDA and SCL Lines

-

300

ns

Setup Time for Stop Condition

4.7

µs

Notes: 12. Use of the I

I

13. Data must be held for sufficient time to bridge the 300ns transition time of SCL.

CS4222

6

DS236PP3