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CDB4340A 데이터시트(PDF) 6 Page - Cirrus Logic |
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CDB4340A 데이터시트(HTML) 6 Page - Cirrus Logic |
6 / 20 page CS4340A 6 DS590PP2 3. APPLICATIONS 3.1 Upgrading from the CS4340 to the CS4340A The CS4340A is pin and functionally compatible with all CS4340 designs, operating at the standard audio sample rates, that use pin 3 as a serial clock input. In addition to the features of the CS4340, the CS4340A supports standard sample rates up to 192 kHz, as well as automatic mode detection for sample rates be- tween 4 and 200 kHz. The automatic mode detection feature allows sample rate changes between single, double and quad-speed modes without external intervention. The CS4340A does not support an internal serial clock mode, sample rates between 50 kHz and 84 kHz or de-emphasis for 32 and 48 kHz, as does the CS4340. 3.2 Sample Rate Range/Operational Mode Detect The device operates in one of three operational modes. It will auto-detect the correct mode when the input sample rate (Fs), defined by the LRCK frequency, falls within one of the ranges illustrated in Table 1. Sam- ple rates outside the specified range for each mode are not supported. 3.3 System Clocking The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK) clocks. The LRCK, defined also as the input sample rate (Fs), must be synchronously derived from the MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard audio sample rates and the required MCLK frequency, are illustrated in Tables 2-4. Input Sample Rate (FS)MODE 4 kHz - 50 kHz Single-Speed Mode 84 kHz - 100 kHz Double-Speed Mode 170 kHz - 200 kHz Quad-Speed Mode Table 1. CS4340A Auto-Detect |
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