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BU4813G-TR 데이터시트(PDF) 10 Page - Rohm |
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BU4813G-TR 데이터시트(HTML) 10 Page - Rohm |
10 / 16 page Datasheet 10/13 BU48xx series BU49xx series TSZ02201-0R7R0G300060-1-2 © 2014 ROHM Co., Ltd. All rights reserved. 03.Feb.2014 Rev.010 www.rohm.com TSZ22111・15・001 ●Application Information Explanation of Operation For both the open drain type(Fig.12)and the CMOS output type(Fig.13), the detection and release voltages are used as threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BU48xx series uses an open drain output type, it is possible to connect a pull-up resistor to VDD or another power supply [The output “High” voltage (VOUT) in this case becomes VDD or the voltage of the other power supply]. Fig.12 (BU48xx type internal block diagram) Fig.13 (BU49xx type internal block diagram) Reference Data Examples of Output rising value(tPLH)and Output falling value(tPHL) Part Number tPLH[µs] tPHL[µs] BU4845 23.3 275.9 BU4945 3.5 354.3 VDD=4.3V 5.1V VDD=5.1V 4.3V * This data is for reference only. This figure will vary with the application, so please confirm actual operation conditions before use. Timing Waveforms Example:The following shows the relationship between the input voltage VDD, the CT Terminal Voltage VCT and the output voltage VOUT when the input power supply voltage VDD is made to sweep up and sweep down (The circuits are those in Fig.12 and 13). ①When the power supply is turned on, the output is unsettled from after over the operating limit voltage (VOPL) until tPHL. Therefore it is possible that the reset signal is not outputted when the rise time of VDD is faster than tPHL. ②When VDD is greater than VOPL but less than the reset release voltage (VDET + VDET), output (VOUT) voltages will switch to L. ③If VDD exceeds the reset release voltage (VDET + VDET), then VOUT switches from L to H (with a delay of tPLH). ④If VDD drops below the detection voltage (VDET) when the power supply is powered down or when there is a power supply fluctuation, VOUT switches to L (with a delay of tPHL). ⑤The potential deference between the detection voltage and the release voltage is known as the hysteresis width (VDET). The system is designed such that the output does not flip-flop with power supply fluctuations within this hysteresis width, preventing malfunctions due to noise. Q1 Vref R1 R2 R3 VOUT VDD GND RL VDD RESET Q2 Q1 Vref R1 R2 R3 VOUT VDD GND RESET VDD VDET+ΔVDET VDET VOPL 0V tPHL ① ② VOUT tPLH tPHL tPLH ③ ④ VOL VOH ⑤ Fig.14 Timing Waveforms |
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