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AD7667 데이터시트(PDF) 4 Page - Analog Devices

부품명 AD7667
상세설명  16-Bit, 6 MSPS, PulSAR Differential ADC
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD7625
Data Sheet
Rev. A | Page 4 of 24
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
LVDS I/O (ANSI-644)
Data Format
Serial LVDS twos complement
Differential Output Voltage, V
OD
R
L = 100 Ω
200
350
454
mV
Common-Mode Output Voltage, V
OCM
2
R
L = 100 Ω
850
1250
1375
mV
Differential Input Voltage, V
ID
100
650
mV
Common-Mode Input Voltage, V
ICM
800
1575
mV
POWER SUPPLIES
Specified Performance
VDD1
4.75
5
5.25
V
VDD2
2.37
2.5
2.63
V
VIO
2.37
2.5
2.63
V
Operating Currents
Static—Not Converting
VDD1
4.5
7.8
mA
VDD2
17
22.7
mA
VIO
Self-clocked mode and echoed-
clock mode
11
13
mA
With Internal Reference
6 MSPS throughput
VDD1
11
15.4
mA
VDD2
21.5
28.3
mA
VIO
Self-clocked mode and echoed-
clock mode
13.5
16
mA
Without Internal Reference
6 MSPS throughput
VDD1
9
12.1
mA
VDD2
21
26
mA
VIO
Self-clocked mode and echoed-
clock mode
13.5
16
mA
Power Dissipation3
Static—Not Converting
95
130
mW
With Internal Reference
6 MSPS throughput
145
190
mW
Without Internal Reference
6 MSPS throughput
135
165
mW
Energy per Conversion
6 MSPS throughput
22
nJ/sample
TEMPERATURE RANGE
Specified Performance
T
MIN to TMAX
−40
+85
°C
1 Using an external reference.
2 The ANSI-644 LVDS specification has a minimum output common mode (V
OCM) of 1125 mV.
3 Power dissipation is for the AD7625 device only. In self-clocked interface mode, 9 mW is dissipated in the 100 Ω terminator. In echoed-clock interface mode, 18 mW is
dissipated in two 100 Ω terminators.


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