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SI8410 데이터시트(PDF) 11 Page - List of Unclassifed Manufacturers

부품명 SI8410
상세설명  LOW-POWER, SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS
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Rev. 1.3
11
Si8410/20/21 (5 kV)
Si8422/23 (2.5 & 5 kV)
All Models
Output Rise Time
tr
CL = 15 pF
2.0
4.0
ns
Output Fall Time
tf
CL = 15 pF
2.0
4.0
ns
Peak Eye Diagram Jitter
tJIT(PK)
See Figure 6
350
ps
Common Mode Transient
Immunity
CMTI
VI =VDD or 0 V
20
45
kV/µs
Start-up Time3
tSU
—15
40
µs
Table 2. Electrical Characteristics (Continued)
(VDD1 = 3.3 V ±10%, VDD2 = 3.3 V ±10%, TA = –40 to 125 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50
, ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.


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