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TPD4S012 데이터시트(PDF) 2 Page - Texas Instruments |
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TPD4S012 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 13 page V BUS D+ D– ID GND PMU/USB Controller V BUS GND D+ D– - ID VBUS D– ID GND Core PMU Chip/ USB Controller D+ D+ D– ID GND VBUS VBUS Core PMU Chip/ USB Controller C1 A2 B2 C2 B2 A2 A1 B1 C1 TPD4S012 SLVS928A – MARCH 2009 – REVISED NOVEMBER 2009 www.ti.com ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE (1) (2) NOMINAL DIMENSIONS (mm) PART NUMBER MARKING SON – DRY Reel of 3000 W = 1.0, L = 1.45, H = 0.55, Pitch = 0.5 TPD4S012DRYR 3B –40°C to 85°C WCSP – XXX Reel of 3000 W = 0.8, L = 1.2, H = 0.5, Pitch = 0.4 TPD4S012XXXR TBD (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. APPLICATION SCHEMATIC If the ID pin is not used, it can be left floating. Board Layout Recommendations Figure 1. Using DRY Package Figure 2. Using YFP Package The TPD4S012 can provide system-level ESD protection to the high-speed differential ports. The flow-through package offers flexibility for board routing. Figure 1 and Figure 2 show the board layout scheme for the D+ and D– lines of a single differential pair. It allows the differential signal pairs couple together right after they touch the ESD ports of the TPD4S012. 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD4S012 |
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