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LM3433 데이터시트(PDF) 2 Page - Texas Instruments |
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LM3433 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 15 page TON ADJ EN DIM VIN CGND HS HO VCC 13 14 18 17 16 15 1 2 3 4 5 6 LS LO BST LM3433 LM3433 SNVS535B – OCTOBER 2007 – REVISED MARCH 2008 www.ti.com Connection Diagram Top View Figure 1. 24-Lead LLP NS Package Number SQA24A Pin Functions Pin Descriptions Pin Name Function On-time programming pin. Tie an external resistor (RON) from TON to CSN, and a capacitor (CON) 1 TON from TON to VEE. This sets the nominal operating frequency when the LED is fully illuminated. Analog LED current adjust. Tie to VIN for fixed 60mV average current sense resistor voltage. Tie to an external reference to adjust the average current sense resistor voltage (programmed output 2 ADJ current). Refer to the "VSENSE vs. ADJ Voltage" graphs in the Typical Performance Characteristics section and the Design Procedure section of the datasheet. Enable pin. Connect this pin to logic level HI or VIN for normal operation. Connect this pin to CGND 3 EN for low current shutdown. EN is internally tied to VIN through a 100k resistor. 4 DIM Logic level input for LED PWM dimming. DIM is internally tied to CGND through a 100k resistor. 5 VIN Logic power input: Connect to positive voltage between +3.0V and +5.8V w.r.t. CGND. 6 CGND Chassis ground connection. 7 VEE Negative voltage power input: Connect to voltage between –14V to –9V w.r.t. CGND. 8 COMP Compensation pin. Connect a capacitor between this pin and VEE. 9 NC No internal connection. Tie to VEE or leave open. Soft Start pin. Tie a capacitor from SS to VEE to reduce input current ramp rate. Leave pin open if 10 SS function is not used. The SS pin is pulled to VEE when the device is not enabled. 11 NC No internal connection. Tie to VEE or leave open. 12 NC No internal connection. Tie to VEE or leave open. 13 LS Low side FET gate drive return pin. 14 LO Low side FET gate drive output. Low in shutdown. Low side FET gate drive power bypass connection and boost diode anode connection. Tie a 2.2µF 15 VCC capacitor between VCC and VEE. 16 BST High side "synchronous" FET drive bootstrap rail. 17 HO High side "synchronous" FET gate drive output. Pulled to HS in shutdown. 18 HS Switching node and high side "synchronous" FET gate drive return. 19 DIMR LED dimming FET gate drive return. Tie to LED cathode. 20 DIMO LED dimming FET gate drive output. DIMO is a driver that switches between DIMR and BST2. 2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Links: LM3433 |
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