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3 / 23 page LM139JAN www.ti.com SNOSAJ7B – FEBRUARY 2005 – REVISED MARCH 2013 Absolute Maximum Ratings (1) Supply Voltage, V+(2) 36 VDC or ±18 VDC Differential Input Voltage(3) 36 VDC Output Voltage 36 VDC Input Voltage −0.3 VDC to +36 VDC Input Current (VIN < −0.3 VDC) (4) (5) 50 mA Power Dissipation(6)(7) CLGA 350 mW @ TA = 125°C Output Short-Circuit to GND,(8) Continuous Storage Temperature Range −65°C ≤ TA ≤ +150°C Maximum Junction Temperature (TJ) +175°C Lead Temperature (Soldering, 10 seconds) 260°C Operating Temperature Range −55°C ≤ TA ≤ +125°C Thermal Resistance θJA CLGA (Still Air) 183°C/W CLGA (500LF / Min Air flow) 120°C/W θJC CLGA 23°C/W Package Weight (typical) CLGA 460mg ESD rating(9) 600V (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see, the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. (2) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20mA independent of the magnitude of V+ (3) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow the magnitude of the negative power supply, if used) (at 25°C). (4) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at 25°)C. (5) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines. (6) The low bias dissipation and the ON-OFF characteristics of the outputs keeps the chip dissipation very small (PD ≤ 100mW), provided the output transistors are allowed to saturate. (7) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (Package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax — TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. (8) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 mA independent of the magnitude of V+. (9) Human Body model, 1.5 K Ω in series with 100 pF Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description Temp (°C) 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM139JAN |
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