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ADC081C021 데이터시트(PDF) 9 Page - Texas Instruments |
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ADC081C021 데이터시트(HTML) 9 Page - Texas Instruments |
9 / 42 page SCL SDA tHD;STA tLOW tr tHD;DAT tHIGH tf tSU;DAT tSU;STA tSU;STO tf START REPEATED START STOP tHD;STA START tSP tr tBUF ADC081C021, ADC081C027 www.ti.com SNAS447C – FEBRUARY 2008 – REVISED MARCH 2013 A.C. and Timing Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Units Symbol Parameter Conditions(1) Typical(2) Limits(1)(2) (Limits) Standard Mode 250 ns (max) 20+0.1Cb ns (min) Fast Mode 250 ns (max) tfDA Fall time of SDA signal 10 ns (min) High Speed Mode, Cb = 100pF 80 ns (max) 20 ns (min) High Speed Mode, Cb = 400pF 160 ns (max) Standard Mode 1000 ns (max) 20+0.1Cb ns (min) Fast Mode 300 ns (max) trCL Rise time of SCL signal 10 ns (min) High Speed Mode, Cb = 100pF 40 ns (max) 20 ns (min) High Speed Mode, Cb = 400pF 80 ns (max) Standard Mode 1000 ns (max) 20+0.1Cb ns (min) Fast Mode 300 ns (max) Rise time of SCL signal after a trCL1 repeated start condition and after an 10 ns (min) High Speed Mode, Cb = 100pF acknowledge bit. 80 ns (max) 20 ns (min) High Speed Mode, Cb = 400pF 160 ns (max) Standard Mode 300 ns (max) 20+0.1Cb ns (min) Fast Mode 300 ns (max) tfCL Fall time of a SCL signal 10 ns (min) High Speed Mode, Cb = 100pF 40 ns (max) 20 ns (min) High Speed Mode, Cb = 400pF 80 ns (max) Capacitive load for each bus line (SCL Cb 400 pF (max) and SDA) Fast Mode 50 ns (max) tSP Pulse Width of spike suppressed(4) High Speed Mode 10 ns (max) (4) Spike suppression filtering on SCL and SDA will suppress spikes that are less than 50ns for standard and fast modes, and less than 10ns for hs-mode. Timing Diagrams Figure 4. Serial Timing Diagram Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ADC081C021 ADC081C027 |
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유사한 설명 - ADC081C021_14 |
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