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ILC1232 데이터시트(PDF) 2 Page - Impala Linear Corporation

부품명 ILC1232
상세설명  mP Supervisory Circuit
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제조업체  IMPALA [Impala Linear Corporation]
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Logo IMPALA - Impala Linear Corporation

ILC1232 데이터시트(HTML) 2 Page - Impala Linear Corporation

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Parameter
Symbol
Ratings
Units
VCC
-0.3 to 6.0
V
Terminal Voltage
All other inputs
-0.3 to (VCC + 0.3)
V
Input Current
VCC
250
mA
GND, All other
inputs
25
mA
Operating Temperature Range
TA
-40 to +85
°C
Storage Temperature Range
-65 to +150
°C
Lead Temperature (Soldering, 10 sec.)
300
°C
Power Dissipation
700
mW
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliabil-
ity. Operating ranges define those limits between which the functionality of the device is guaranteed.
VCC = 4.5 V to 5.5 V, TA = Operating Temperature Range, unless otherwise noted.
Parameter
Conditions
Min
Typ
Max
Units
Operating Voltage Range, VCC
4.5
5.5
V
Supply Current, ICC
(See Note 1)
18
40
µA
ST and PBRST Input Levels
VIH (See Note 2)
VIL
2.0
-0.3
VCC + 0.3
0.8
V
Input Leakage, IIL
1
µA
Output Source Current, RST
VOH = 2.4V
1.0
10
mA
Output Sink Current, RST, RST
VOL = 0.4V
2.0
10
mA
VCC 5% Trip Point (Reset Threshold Voltage)
TOL= GND
4.50
4.62
4.74
V
VCC 10% Trip Point (Reset Threshold Voltage)
TOL= VCC
4.25
4.37
4.49
V
Input Capacitance, ST, TOL
CIN (See Note 3)
5
pF
Output Capacitance, RST, RST
COUT (See Note 3)
7
pF
PBRST Min. Pulse Width, tPB
PBRST = VIL (See Note 4)
20
ms
PBRST Delay, tPBD
1
4
20
ms
Reset Active Time, tRST
250
610
1000
ms
ST Pulse Width, tST
20
ns
ST Timeout Period, tTD
TD = 0V
TD = Open
TD = VCC
62.5
250
500
150
600
1200
250
1000
2000
ms
VCC Fall Time, tF
10
µs
VCC Rise Time, tR
0
ns
VCC Detect to RST Low and RST High, tRPD
VCC Falling at 1.66 mV/
µs
50
150
µs
VCC Detect to RST Open and RST Low, tRPU
VCC Rising (See Note 5)
250
610
1000
ms
Note 1: ICC is measured with outputs open and inputs within 0.5V of supply rails.
Note 2: PBRST has an internal 40k
Ω (typical) pull-up resistor to V
CC.
Note 3: Guaranteed by design.
Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset.
Note 5: RST has an open drain output.
ILC1232 mP Supervisory Circuit
Sept 1999
Impala Linear Corporation
2
(408) 574-3939
www.impalalinear.com
ILC1232 1.1
June 1999
Absolute Maximum Ratings
Electrical Characterisitcs


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