Pin

Number

Pin

Name

Description

1

PBRST

Pushbutton reset input. This input is debounced and can be driven with

external logic signals or a mechanical push button to actively force a reset.

All pulses less than 1ms in duration on the PBRST pin are ignored. Any

pulse with a duration of 20ms or greater is guaranteed to cause a reset.

2

TD

Time delay input. This input selects the timebase used by the watchdog

timer. When TD = 0V, the watchdog timeout period is set to a nominal

value of 150ms, when TD = open, the watchdog timeout period is set to a

is 1.2 sec nominally.

3

TOL

reset threshold voltage. When TOL = 0 V, the 5% tolerance level is

4

GND

Ground pin, 0V reference.

5

RST

watchdog times out or PBRST is pulled low for a minimum of 20ms. RST

threshold or after the watchdog times out or after PBRST goes high.

6

RST

watchdog times out or PBRST is pulled low for a minimum of 20ms. RST

threshold or after the watchdog times out or after PBRST goes high.

Open-drain output.

7

ST

Input to the watchdog timer. If ST does not see a transition from high to

low within the watchdog timeout period, RST and RST will be asserted.

8

Power supply input, 5V.

8

1

Reset

Generator

6

4

-

+

ST

RST

GND

3

7

2

Trip Point

Select

Ref

Manual Reset

Debounce

Watchdog

Timer

Timeout

Select

5

RST

TOL

PBRST

TD

ILC1232 mP Supervisory Circuit

Sept 1999

Impala Linear Corporation

3

(408) 574-3939

www.impalalinear.com

ILC1232 1.1

June 1999

Pin Functions

Block Diagram