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AD5332 데이터시트(PDF) 5 Page - Analog Devices

부품명 AD5332
상세설명  2.5 V to 5.5 V, 230 A, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs
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AD5332/AD5333/AD5342/AD5343
–5–
AD5332 FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
DAC
REGISTER
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INTER-
FACE
LOGIC
DB7
DB0
CS
WR
A0
CLR
LDAC
.
.
.
VREFA
RESET
VREFB
VOUTA
BUFFER
AD5332
VOUTB
BUFFER
VDD
POWER-DOWN
LOGIC
PD GND
8-BIT
DAC
8-BIT
DAC
AD5332 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1VREFB
Unbuffered reference input for DAC B.
2VREFA
Unbuffered reference input for DAC A.
3VOUTA
Output of DAC A. Buffered output with rail-to-rail operation.
4VOUTB
Output of DAC B. Buffered output with rail-to-rail operation.
5
GND
Ground reference point for all circuitry on the part.
6
CS
Active low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
7
WR
Active low Write Input. This is used in conjunction with CS to write data to the parallel interface.
8
A0
Address pin for selecting which DAC A and DAC B.
9
CLR
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
10
LDAC
Active low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
11
PD
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
12
VDD
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
13–20
DB0–DB7
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
AD5332 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD5332
LDAC
A0
WR
CS
GND
VREFB
VREFA
VOUTB
VOUTA
PD
VDD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
8-BIT
CLR


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AD5332BRU AD-AD5332BRU Datasheet
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