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ISL57406IN 데이터시트(PDF) 7 Page - Intersil Corporation |
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ISL57406IN 데이터시트(HTML) 7 Page - Intersil Corporation |
7 / 12 page 3-7 Sample Clock Pulse Width (High) (Note 2) 7.5 8.3 - ns Sample Clock Duty Cycle Variation - ±5- % POWER SUPPLY CHARACTERISTICS Analog Supply Voltage, AVCC (Note 2) 2.7 3.0 3.6 V Digital Supply Voltage, DVCC1 and DVCC2 (Note 2) 2.7 3.0 3.6 V Supply Current Total, ICCT - - 93.3 mA Analog Supply Current IACC - - 68.3 mA Digital Supply Current IDCC - - 25 mA Power Dissipation Total PT - - 280 mW Offset Error Sensitivity, ∆VOS AVCC or DVCC = 3V ±5% - ±0.5 - LSB Gain Error Sensitivity, ∆FSE AVCC or DVCC = 3V ±5% - ±0.5 - LSB NOTES: 2. Parameter guaranteed by design or characterization and not production tested. 3. With the clock low and DC input. Electrical Specifications AVCC = DVCC = +3.0V; I/QVRIN = 1.25V; fS = 60MSPS at 50% Duty Cycle; CL = 10pF; TA = 25 oC; Differential Analog Input, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS ISL5740 |
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