LF3320QC12 datasheet(6/24 Pages) LODEV

부품명	LF3320QC12

상세설명	Horizontal Digital Image Filter

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제조업체	LODEV [LOGIC Devices Incorporated]

홈페이지	http://www.logicdevices.com

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DEVICES INCORPORATED

LF3320

Horizontal Digital Image Filter

2-6

08/16/2000–LDS.3320-N

Video Imaging Products

OPERATIONAL MODES

Single Filter Mode

In this mode, the device operates as a

single FIR filter (see Figure 4). It can be

configured to have as many as 32 taps if

symmetric coefficient sets are used. If

asymmetric coefficient sets are used, the

device can be configured to have as

many as 16 taps. Cascade ports are

provided to facilitate cascading multiple

devices to increase the number of filter

taps. Bit 1 in Configuration Register 5

determines the filter mode. In Single

Filter Mode, DIN11-0 is the data input

for the filter and DOUT15-0 is the data

outputforthefilter.

Dual Filter Mode

In this mode, the device operates as

two separate FIR filters (see Figure 5).

Each filter can be configured to have as

many as 16 taps if symmetric coeffi-

cient sets are used. If asymmetric

coefficient sets are used, each filter can

be configured to have as many as 8

taps. In Dual Filter Mode, DIN11-0 is

the data input for Filter A. Either

RIN11-0 or DIN11-0 can be the data

input for Filter B. The Filter B input is

determined by Bit 2 in Configuration

Register 5. DOUT15-0 is the data

output for Filter A. COUT11-0 and

ROUT3-0 together form the data output

for Filter B. COUT11-0 is the twelve

least significant bits and ROUT3-0 is

the four most significant bits of the

16-bit Filter B output.

Matrix-vector Multiply Mode

In this mode, the LF3320 can be

configured to multiply a square matrix

of maximum size N (N = 8 or 16),

multiplied by a matrix-vector of

maximum size [8,1] or [16,1]. The

mathematical representation for this

operation is in Figure 7. When config-

ured in the dual filter mode, the LF3320

can process two matrix-vector multipli-

ers simultaneously (i.e. [8x8][8x1]). In

the single filter mode, the LF3320 can

process a single matrix-vector multiply

(i.e. [16x16][16x1]). This mode of

operation allows the user to organize

data values (e.g. pixels) into an array

(e.g. blocks). This function is useful for

any application requiring the opera-

tion of matrix multiplication; a func-

tion that is used when generating

Discrete Cosine Transform coefficients

(DCT) for the purpose of further

processing.

When configuring the LF3320 for an

[8x8][8x1] matrix-vector operation, the

coefficient banks will require 8 coeffi-

cient sets to be loaded into the coefficient

memory banks; each coefficient set will

have 8, 12-bit coefficients. The input

data, [8x1] column-vector, will be loaded

through DIN11-0 for Filter A; either

RIN11-0 or DIN11-0 can be the data

input for Filter B. Conversely, when

configured for a [16x16][16x1]

matrix-vectoroperation,thecoefficient

banks will require 16 coefficient sets to

beloadedintothecoefficientmemory

banks; each coefficient set will have 16,

12-bit coefficients. The input data,

[16x1] column-vector, will be loaded

throughDIN11-0.

To configure the LF3320 for

matrix-vector multiplication, bit 4 of

Configuration Register 5 must be set to

1 (Table 7). The configuration for

single filter mode or dual filter mode

will still apply. Writing 012H or 016H

to Configuration Register 5 will

configure the device for dual filter

mode, [8x8][8x1] matrix-vector multi-

plication. Subsequently, writing 014H

to Configuration Register 5 will

configure the device for single filter

C = COEFFICIENTS

D = DATA INPUT

R = DATA OUTPUT

R0

R1

R2

Ri

=

C00

C10

C20

Ci0

C01

C11

C21

Ci1

C02

C12

C22

Ci2

C0j

C1j

C2j

Cij

D0

D1

D2

Di

Ri

=

Cij Di

(N-1)

i=0

For j=0,1,2,...,(N-1)

N=8 or 16

FIGURE 7. MATRIX EQUATION

ALU

AB

ALU

AB

COEF 2

ALU

AB

0

COEF 1

DIN11-0

Dual Filter Mode, N=8

N

ALU

AB

COEF 0

32

12

Single FIlter Mode, N=16

TXFRA

TXFRB

RIN11-0

COEF (N-1)

0

FIGURE 6. MATRIX-VECTOR MULTIPLY MODE

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