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74LVC1G18 데이터시트(PDF) 7 Page - NXP Semiconductors |
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74LVC1G18 데이터시트(HTML) 7 Page - NXP Semiconductors |
7 / 13 page 74LVC1G18_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 30 August 2007 7 of 13 NXP Semiconductors 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output 12. AC waveforms Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 3. Input A to output Y propagation delays mnb089 A input nY output tPHL tPLH GND VI VM VM VM VM VOH VOL Table 9. Measurement points VCC VM Input VI tr = tf 1.65 V to 1.95 V 0.5 × V CC VCC ≤ 2.0 ns 2.3 V to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 V to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 V to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. VX = VOL + 0.3 V at VCC ≥ 2.7 V. VX = VOL + 0.15 V at VCC < 2.7 V. VY = VOH − 0.3 V at VCC ≥ 2.7 V. VY = VOH − 0.15 V at VCC < 2.7 V. Fig 4. 3-state enable and disable times mnb090 tPLZ tPHZ output disabled output enabled VY VX output enabled nY output LOW-to-OFF OFF-to-LOW S input nY output HIGH-to-OFF OFF-to-HIGH VOL VOH VCC VI VM GND GND tPZL tPZH VM VM |
유사한 부품 번호 - 74LVC1G18_15 |
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유사한 설명 - 74LVC1G18_15 |
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