9

FN6582.1

November 3, 2009

Detailed Description

The ISL54063 and ISL54064 are bidirectional, dual single

pole-single throw (SPST) analog switches that offers precise

switching from a single 1.8V to 6.5V supply with low

ON-resistance (0.83

Ω), high speed operation (t

device is especially well suited for portable battery powered

equipment due to its low operating supply voltage (1.8V), low

power consumption (20nA), and a tiny 1.8mmx1.4mm µ

TQFN

package or a 3mmx3mm TDFN package. The low

loss and signal distortion for applications that require signal

switching with minimal interference by the switch.

The ISL54063 is a normally open (NO) SPST analog switch.

The ISL54064 is a normally closed (NC) SPST analog

switch.

Supply Sequencing and Overvoltage Protection

With any CMOS device, proper power supply sequencing is

required to protect the device from excessive input currents

which might permanently damage the IC. The ISL54063 and

ISL54064 contains ESD protection diodes on each pin of the

IC (see Figure 8). These diodes connect to either a +Ring or

-Ring for ESD protection. To prevent forward biasing the

ESD diodes to the +Ring, V+ must be applied before any

input signals, and the input signal voltages must remain

between recommended operating range.

If these conditions cannot be guaranteed, then precautions

must be implemented to prohibit the current and voltage at

the logic pin and signal pins from exceeding the maximum

ratings of the switch. The following two methods can be used

to provided additional protection to limit the current in the

event that the voltage at a logic pin or switch terminal goes

above the V+ rail.

Logic inputs can be protected by adding a 1k

Ω resistor in

series with the logic input (see Figure 8). The resistor limits

the input current below the threshold that produces

permanent damage.

FIGURE 5. CROSSTALK TEST CIRCUIT

FIGURE 6. CAPACITANCE TEST CIRCUIT

FIGURE 7A. CLICK AND POP WAVEFORM

FIGURE 7B. CLICK AND POP TEST CIRCUIT

FIGURE 7. CLICK AND POP ELIMINATION

0V OR V+

ANALYZER

V+

C

NO1 OR NC1

SIGNAL

GENERATOR

GND

COM1

50

Ω

NC

COM2

NC2 OR NO2

Signal direction through switch is reversed, worst case values

are recorded. Repeat test for all switches.

*50

Ω SOURCE

V+

C

GND

NO OR NC

COM

IN

IMPEDANCE

ANALYZER

0V OR V+

0V

0V

CLICK AND POP

CIRCUITRY

220µF

220µF

INx

COMx

NCx

NOx

ISL54063, ISL54064