전자부품 데이터시트 검색엔진 |
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ISL54217IRUZ-T 데이터시트(PDF) 7 Page - Intersil Corporation |
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ISL54217IRUZ-T 데이터시트(HTML) 7 Page - Intersil Corporation |
7 / 24 page 7 FN6817.4 June 17, 2010 C0, C1 Pull-Down Resistor, RCx VDD = 3.6V, C0 = C1= 3.6V, Measure current into C0 or C1 pin and calculate resistance value. Full - 4 - MΩ NOTES: 11. VLOGIC = Input voltage to perform proper function. 12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 14. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 15. Limits established by characterization and are not production tested. 16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value, between L and R or between 1D+ and 1D- or between 2D+ and 2D-. Test Circuits and Waveforms Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. ADDRESS tTRANS MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 1B. ADDRESS tTRANS TEST CIRCUIT FIGURE 1. SWITCHING TIMES Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VC0H, VC1H = 1.4V, VC0L, VC1L= 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Notes 12, 13) TYP MAX (Notes 12, 13) UNITS 50% tr < 20ns tf < 20ns tOFF 90% VC0,C1 0V VINPUT VC0,C1 tON LOGIC INPUT SWITCH INPUT SWITCH OUTPUT 90% VOUT VOUT V(INPUT) RL RL rON + ------------------------ = SWITCH INPUT LOGIC VOUT RL CL COMx C0, C1 50 Ω 10pF GND VDD C VINPUT INPUT ISL54217 |
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