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TC534CKW 데이터시트(PDF) 11 Page - Microchip Technology |
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TC534CKW 데이터시트(HTML) 11 Page - Microchip Technology |
11 / 22 page © 2002 Microchip Technology Inc. DS21433B-page 11 TC530/TC534 4. Calculate RINT EXAMPLE 4-3: 5. Calculate CINT for maximum (4V) integrator out- put swing: EXAMPLE 4-4: Note: Microchip recommended capacitor: Evox-Rifa p/n: SMR5 334K50J03L 6. Choose CREF and CAZ based on conversion rate: EXAMPLE 4-5: Note: Microchip recommended capacitor: Evox-Rifa p/n: SMR5 224K50J02L4 7. Calculate VREF. EXAMPLE 4-6: 4.5 Power Supply Sequencing Improper sequencing of the power supply inputs (VDD vs. VCCD) can potentially cause an improper power-up sequence to occur. See Section 4.6, Circuit Design/ Layout Considerations. Failing to insure a proper power-up sequence can cause spurious operation. 4.6 Circuit Design/Layout Considerations 1. Separate ground return paths should be used for the analog and digital circuitry. Use of ground planes and trace fill on analog circuit sections is highly recommended EXCEPT for in and around the integrator section and CREF,CAZ (CINT, CREF,CAZ,RINT). Stray capacitance between these nodes and ground appears in parallel with the components themselves and can affect measurement accuracy. 2. Improper sequencing of the power supply inputs (VDD vs. VCCD) can potentially cause an improper power-up sequence to occur in the internal state machines. It is recommended that the digital supply, VCCD, be powered up first. One method of insuring the correct power-up sequence is to delay the analog supply using a series resistor and a capacitor. See Figure 4-1, TC530/TC534 Typical Application. 3. Decoupling capacitors, preferably a higher value electrolytic or tantulum in parallel with a small ceramic or tantalum, should be used liber- ally. This includes bypassing the supply connec- tions of all active components and the voltage reference. 4. Critical components should be chosen for stabil- ity and low noise. The use of a metal-film resistor for RINT and Polypropylene or Polyphenelyne Sulfide (PPS) capacitors for CINT,CAZ and CREF is highly recommended. 5. The inputs and integrator section are very high impedance nodes. Leakage to or from these crit- ical nodes can contribute measurement error. A guard-ring should be used to protect the integra- tor section from stray leakage. 6. Circuit assemblies should be exceptionally clean to prevent the presence of contamination from assembly, handling or the cleaning itself. Minute conductive trace contaminates, easily ignored in most applications, can adversely affect the performance of high impedance cir- cuits. The input and integrator sections should be made as compact and close to the TC53X as possible. 7. Digital and other dynamic signal conductors should be kept as far from the TC53X’s analog section as possible. The microcontroller or other host logic should be kept quiet during a mea- surement cycle. Background activities such as keypad scanning, display refreshing and power switching can introduce noise. RINT =VINMAX/20 = 2/20 = 100kΩ CINT =(TINT)(20 x 10 –6)/ (V S –0.9) = (.066)(20 x 10–6)/(4.1) =.32 µF (use closest value: 0.33µF) Conversions/sec = 1/(TAZ +TINT +2TINT +2msec) = 1/(66msec + 66msec + 132msec + 2msec) = 3.7 conversions/sec from which CAZ =CREF =0.22µF (Table 5-1) (VS –0.9) (CINT)(RINT) VREF = 2(TINT) =(4.1) (0.33x1–6)(105) / 2(.066) = 1.025V |
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