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SM72442 데이터시트(PDF) 8 Page - Texas Instruments

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부품명 SM72442
상세설명  Programmable Maximum Power Point Tracking Controller for Photovoltaic Solar Panels
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VOUT_MAX = 5 x
RB1
RT1 + RB1
x
(RFB1 + RFB2)
RFB2
SM72442
SNVS689H – OCTOBER 2010 – REVISED APRIL 2013
www.ti.com
STARTUP
SM72442 has a soft start feature that will ramp its output voltage for a fixed time of 250ms.
If no output current is detected during soft-start time, the chip will then be in Panel Mode for 60 seconds. A
counter will start once the minimum output current threshold is met (set by ADC input channel 4). During these
60 seconds, any variation on the output power will not cause the chip to enter MPPT mode. Once 60 seconds
have elapsed, at a certain power level variation at the output (set by ADC input channel 2) will engage the chip in
MPPT mode.
If the output current exceeded the current threshold set at A/D Channel 6 (A6) during soft-start, the chip will then
engage in MPPT mode.
Figure 5. Startup Sequence
MAXIMUM OUTPUT VOLTAGE
Maximum output voltage on the SM72442 is set by resistor divider ratio on pin A0. (Please refer to Figure 2
Typical Application Circuit).
where
RT1 and RB1 are the resistor divider on the ADC pin A0
RFB1 and RFB2 are the output voltage sense resistors. A typical value for RFB2 is about 2 k
(1)
CURRENT LIMIT SETTING
Maximum output current can be set by changing the resistor divider on A4 (pin 18). Refer to Figure 2.
Overcurrent at the output is detected when the voltage on AIOUT (pin 21) equals the voltage on A4 (pin 18). The
voltage on A4 can be set by a resistor divider connected to 5V whereas the voltage on AIOUT can be set by a
current sense amplifier.
AVIN PIN
AVIN is an A/D input to sense the input voltage of the SM72442. A resistor divider can be used to scale max
voltage to about 4V, which is 80% of the full scale of the A/D input.
CONFIGURABLE SETTINGS
A/D pins A0, A2, A4, and A6 are used to configure the behavior of the SM72442 by adjusting the voltage applied
to them. One way to do this is through resistor dividers as shown in Figure 2, where RT1 to RT4 should be in the
range of 20 k
Ω.
8
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