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LM3673 데이터시트(PDF) 3 Page - Texas Instruments |
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LM3673 데이터시트(HTML) 3 Page - Texas Instruments |
3 / 28 page A3 A1 C1 A3 C3 EN FB SW GND VIN EN GND SW FB B2 VIN A1 C3 C1 B2 LM3673 www.ti.com SNVS434L – JULY 2006 – REVISED OCTOBER 2015 5 Voltage Options ORDERABLE NUMBER(1)(2) VOLTAGE OPTION LM3673TL-ADJ/NOPB ADJ LM3673TLX-ADJ/NOPB LM3673TL-1.2/NOPB 1.2 LM3673TLX-1.2/NOPB LM3673TL-1.5/NOPB 1.5 LM3673TLX-1.5/NOPB LM3673TL-1.8/NOPB 1.8 LM3673TLX-1.8/NOPB (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 6 Pin Configuration and Functions YZR Package 5-Pin DSBGA Top (Left) and Bottom (Right) Views Pin Functions PIN I/O DESCRIPTION NUMBER NAME A1 VIN Power Power supply input. Connect to the input filter capacitor (Figure 17). A3 GND Ground Ground pin B2 SW Analog Switching node connection to the internal PFET switch and NFET synchronous rectifier. Enable pin. The device is in shutdown mode when voltage to this pin is < 0.4 V and enabled C1 EN Input when > 1 V. Do not leave this pin floating. Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. C3 FB Analog For adjustable version external resistor dividers are required (Figure 18). The internal resistor dividers are disabled for the adjustable version. Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM3673 |
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