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ML4428

FUNCTIONAL DESCRIPTION

The ML4428 provides closed-loop commutation for

3-phase brushless motors. To accomplish this task, a VCO,

integrating back-EMF Sampling error amplifier and

sequencer form a phase-locked loop, locking the VCO to

the back-EMF of the motor. The IC contains circuitry to

control motor speed in PWM mode. Braking and power

fail detection functions are also provided on the chip. The

ML4428 is designed to drive external power transistors

(N-channel sinking transistors and P-channel sourcing

transistors) directly.

The ML4428 limits the motor current with a constant off-

time PWM controlled current. The velocity loop is

controlled with an on-board amplifier. An accurate, jitter-

free VCO output is provided equal to the commutation

frequency of the motor. The ML4428 switches the gates of

external N-channel power MOSFETs to regulate the motor

current and directly drives the P-channel MOSFETs for

12V motors. The ML4428 ensures that there is no shoot

through in any state of power drive to the FETs. Higher

voltage motors can be driven using buffer transistors or

standard “high side” drivers.

Speed sensing is accomplished by monitoring the output

of the VCO, which will be a signal which is phase-locked

to the commutation frequency of the motor.

BACK-EMF SENSING AND COMMUTATOR

The ML4428 contains a patented back-EMF sensing circuit

(Figure 1) which samples the phase which is not energized

(Shaded area in Figure 2) to determine whether to increase

or decrease the commutator (VCO) frequency. A late

commutation causes the error amplifier to charge the filter

voltage.

The input impedance of the three PH inputs is about

8.7ký to GND. When operating with a higher voltage

motor, the PH inputs should be divided down in voltage

with series resistors so that the maximum voltage at any

NEUTRAL

0

60

120

180

240

0

300

Figure 2. Typical Motor Phase Waveform with back-EMF

Superimposed (Ideal Commutation).

Figure 1. Back-EMF Sensing Block Diagram

NEUTRAL

SIMULATOR

ΦA + ΦB + ΦC

9

PHI1

PHI2

PHI3

MULTIPLEXER

R

C1

C2

VCO

COMMUTATION

LOGIC

SIGN

CHANGER

b

a

–

+

LOOP FILTER

I(RC) =

Va – Vb

4.35K

2.9K

5.8K

VCO

22

23

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