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CS5150HGDR16 데이터시트(PDF) 11 Page - ON Semiconductor |
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CS5150HGDR16 데이터시트(HTML) 11 Page - ON Semiconductor |
11 / 17 page CS5150H http://onsemi.com 11 condition ceases or the input voltage is pulled low. The bottom FET and board trace must be properly designed to implement the OVP function. Figure 14. OVP Response to an Input−to−Output Short Circuit by Immediately Providing 0% Duty Cycle, Crow−Barring the Input Voltage to Ground M 10.0 μs Trace 1− Regulator Output Voltage (1.0 V/div.) Trace 2− Inductor Switching Node 5.0 V/div.) Trace 4− 5.0 V from PC Power Supply (5.0 V/div.) Figure 15. OVP Response to an Input−to−Output Short Circuit by Pulling the Input Voltage to Ground M 5.00 ms Trace 1− Regulator Output Voltage (1.0 V/div.) Trace 4− 5.0 V from PC Power Supply (2.0 V/div.) External Output Enable Circuit On/off control of the regulator can be implemented through the addition of two additional discrete components (see Figure 16). This circuit operates by pulling the Soft Start pin high, and the VFFB pin low, emulating a short circuit condition. Figure 16. Implementing Shutdown with the CS5150H Shutdown Input 5.0 V MMUN2111T1 (SOT−23) 5 8 V FFB SS IN4148 CS5150H External Power Good Circuit An optional Power Good signal can be generated through the use of four additional external components (see Figure 17). The threshold voltage of the Power Good signal can be adjusted per the following equation: VPower Good + (R1 ) R2) 0.65 V R2 This circuit provides an open collector output that drives the Power Good output to ground for regulator voltages less than VPower Good. Figure 17. Implementing Power Good with the CS5150H 5.0 V Power Good 10 k VOUT PN3904 6.2 k R1 R2 PN3904 10 k R3 CS5150H |
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