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SM5838AS 데이터시트(PDF) 6 Page - Nippon Precision Circuits Inc

부품명 SM5838AS
상세설명  5120 X 8-bit Synchronous FIFO
Download  14 Pages
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제조업체  NPC [Nippon Precision Circuits Inc]
홈페이지  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM5838AS 데이터시트(HTML) 6 Page - Nippon Precision Circuits Inc

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SM5838AS
NIPPON PRECISION CIRCUITS—6
FUNCTIONAL DESCRIPTION
At power-ON reset, device operation can become
irregular during the interval when the control circuits
are being reset. After power-ON reset is released,
this can take up to several 10s of ms in some cases.
Write Reset Cycle, Read Reset Cycle
After power-ON, the write address pointer and read
address pointer positions are undefined. Accordingly,
it is necessary to initialize the pointers using a write
reset cycle and read reset cycle, respectively.
A write reset cycle (read reset cycle) is valid when
RW (RR) goes LOW for an interval that satisfies
both the CLK rising edge setup time (tRS) and hold
time (tRH). Note that a write reset cycle (read reset
cycle) can occur simultaneously with a write cycle
(read cycle). If the cycles are not simultaneous, then
the write reset cycle (read reset cycle) is completed
at the start of the next write cycle (read cycle).
Write reset cycle
Read reset cycle
Note the even if a reset period (tRW, tRR) is zero
length in the write reset and read reset cycles, the
reset operation does take place.
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
CKW
t
RS
t
RS
t
RH
t
RH
t
RW
t
DS
t
DH
t
DH
t
CLK
DIN (n-1)
(n)
(1)
(0)
RW
CKW
t
DS
t
WE="L"
n cycle
reset cycle
0 cycle
1 cycle
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
,,,,,,,
RR
CKW
t
RS
t
RS
t
RH
t
RH
t
CLK
DOUT
CKW
t
(n-1)
(n)
(1)
(0)
RE="L" , OE="L"
(0)
RR
t
A
t
A
t
A
t
A
t
OH
t
OH
t
OH
t
n cycle
reset cycle
0 cycle
1 cycle


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