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MT8870DS

 ISO2-CMOS Integrated DTMF Receiver ( 12 Page)


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MT8870D/MT8870D-1 ISO2-CMOS
4-16
Applications
RECEIVER SYSTEM FOR BRITISH TELECOM
SPEC POR 1151
The circuit shown in Fig. 9 illustrates the use of
MT8870D-1 device in a typical receiver system. BT
Spec defines the input signals less than -34 dBm as
the non-operate level.
This condition can be
attained by choosing a suitable values of R1 and R2
to provide 3 dB attenuation, such that -34 dBm input
signal will correspond to -37 dBm at the gain setting
pin GS of MT8870D-1. As shown in the diagram, the
component values of R3 and C2 are the guard time
requirements when the total component tolerance is
6%. For better performance, it is recommended to
use the non-symmetric guard time circuit in Fig. 8.
Figure 8 - Non-Symmetric Guard Time Circuit
tGTP=(RPC1)In[VDD/(VDD-VTSt)]
tGTA=(R1C1)In(VDD/VTSt)
RP=(R1R2)/(R1+R2)
VDD
St/GT
ESt
C1
R2
R1
Notes:
R1=368K Ω ± 1%
R2=2.2M Ω ± 1%
C1=100nF ± 5%
Figure 9 - Single-Ended Input Configuration for BT or CEPT Spec
IN+
IN-
GS
VRef
INH
PWDN
OSC 1
OSC 2
VSS
TOE
VDD
St/GT
ESt
StD
Q4
Q3
Q2
Q1
DTMF
Input
C1
R1
R2
X1
VDD
C2
R3
MT8870D-1
NOTES:
R1 = 102KΩ ± 1%
R2 = 71.5KΩ ± 1%
R3 = 390KΩ ±1 %
C1,C2 = 100 nF ± 5%
X1 = 3.579545 MHz ± 0.1%
VDD = 5.0V ± 5%
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