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TPA3251D2DDV 데이터시트(PDF) 9 Page - Texas Instruments |
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TPA3251D2DDV 데이터시트(HTML) 9 Page - Texas Instruments |
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9 / 39 page  TPA3251D2 www.ti.com SLASE40C – JUNE 2015 – REVISED JUNE 2015 7.7 Audio Characteristics (SE) PCB and system configuration are in accordance with recommended guidelines. Audio frequency = 1 kHz, PVDD_X = 36 V, GVDD_X = 12 V, RL = 2 Ω, fS = 600 kHz, ROC = 22 kΩ, TC = 75°C, Output Filter: LDEM = 15 μH, CDEM = 1 µF, MODE = 11, AES17 + AUX-0025 measurement filters, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RL = 2 Ω, 10% THD+N 84 RL = 3 Ω, 10% THD+N 60 RL = 4 Ω, 10% THD+N 47 PO Power output per channel W RL = 2 Ω, 1% THD+N 67 RL = 3 Ω, 1% THD+N 48 RL = 4 Ω, 1% THD+N 37 THD+N Total harmonic distortion + noise 1 W 0.015% A-weighted, AES17 filter, Input Capacitor Vn Output integrated noise 115 μV Grounded SNR Signal to noise ratio(1) A-weighted 100 dB DNR Dynamic range A-weighted 101 dB Pidle Power dissipation due to idle losses (IPVDD_X) PO = 0, 4 channels switching (2) 0.5 W (1) SNR is calculated relative to 1% THD+N output level. (2) Actual system idle losses are affected by core losses of output inductors. 7.8 Audio Characteristics (PBTL) PCB and system configuration are in accordance with recommended guidelines. Audio frequency = 1 kHz, PVDD_X = 36 V, GVDD_X = 12 V, RL = 2 Ω, fS = 600 kHz, ROC = 22 kΩ, TC = 75°C, Output Filter: LDEM = 10 μH, CDEM = 1 µF, MODE = 10, AES17 + AUX-0025 measurement filters, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RL = 2 Ω, 10% THD+N 355 RL = 3 Ω, 10% THD+N 250 RL = 4 Ω, 10% THD+N 195 PO Power output per channel W RL = 2 Ω, 1% THD+N 285 RL = 3 Ω, 1% THD+N 200 RL = 4 Ω, 1% THD+N 155 THD+N Total harmonic distortion + noise 1 W 0.05% A-weighted, AES17 filter, Input Capacitor Vn Output integrated noise 62 μV Grounded SNR Signal to noise ratio(1) A-weighted 111 dB DNR Dynamic range A-weighted 111 dB Pidle Power dissipation due to idle losses (IPVDD_X) PO = 0, 4 channels switching (2) 1 W (1) SNR is calculated relative to 1% THD+N output level. (2) Actual system idle losses are affected by core losses of output inductors. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPA3251D2 |
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