전자부품 데이터시트 검색엔진 |
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54ACT573D 데이터시트(PDF) 3 Page - National Semiconductor (TI) |
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54ACT573D 데이터시트(HTML) 3 Page - National Semiconductor (TI) |
3 / 10 page Functional Description The ’ACT573 contains eight D-type latches with TRI-STATE output buffers. When the Latch Enable (LE) input is HIGH, data on the D n inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE buffers are controlled by the Output Enable (OE) input. When OE is LOW, the buffers are enabled. When OE is HIGH the buffers are in the high impedance mode but this does not interfere with entering new data into the latches. Truth Table Inputs Outputs OE LE D O n LH H H LH L L LL X O 0 HX X Z H = HIGH Voltage L = LOW Voltage Z = High Impedance X = Immaterial O0 = Previous O0 before HIGH-to-LOW transition of Latch Enable Logic Diagram DS100332-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.national.com |
유사한 부품 번호 - 54ACT573D |
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유사한 설명 - 54ACT573D |
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