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ADP1055DC1-EVALZ 데이터시트(PDF) 11 Page - Analog Devices |
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ADP1055DC1-EVALZ 데이터시트(HTML) 11 Page - Analog Devices |
11 / 140 page Data Sheet ADP1055 Rev. A | Page 11 of 140 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 OVP Overvoltage Protection. This signal is referenced to AGND and is used for redundant OVP protection. The nominal voltage at this pin should be 1 V. If this pin is not used, connect it to AGND. 2 VS+ Noninverting Voltage Sense Input. This signal is referenced to VS−. The nominal input voltage at this pin is 1 V. The resistor divider on this input must have a tolerance specification of 0.5% or better to allow for trimming. This pin is the input to the high frequency flash ADC. 3 VS− Inverting Voltage Sense Input. There should be a low ohmic connection to AGND. The resistor divider on this input must have a tolerance specification of 0.5% or better to allow for trimming. To reduce common-mode noise, connect a 0.1 μF capacitor from VS− to AGND. 4 CS2+ Noninverting Differential Current Sense Input. This signal is referenced to CS2−. If this pin is not used, connect it to AGND. 5 CS2− Inverting Differential Current Sense Input. If this pin is not used, connect it to AGND. This pin must have a low ohmic connection to AGND thought the sense resistor. 6 NC No Connect. Leave this pin unconnected. 7 VFF Voltage Feedforward. Two optional functions can be implemented using this pin: feedforward and input voltage loss detection. This pin is typically connected upstream of the output inductor through a resistor divider network in an isolated converter. The nominal voltage at this pin should be 1 V. This signal is referenced to AGND. If this pin is not used, connect it to AGND. 8 CS1 Primary Side Current Sense Input. This pin is connected to the primary side current sensing ADC and to the fast OCP comparator. This signal is referenced to PGND. The resistors on this input must have a tolerance specification of 0.5% or better to allow for trimming. If this pin is not used, connect it to AGND. 9 SR1 Synchronous Rectifier Output. This PWM output connects to the input of a FET driver. This pin can be disabled when not in use. This signal is referenced to AGND. 10 SR2 Synchronous Rectifier Output. This PWM output connects to the input of a FET driver. This pin can be disabled when not in use. This signal is referenced to AGND. 11 OUTA PWM Output for Primary Side Switch. This pin can be disabled when not in use. This signal is referenced to AGND. 12 OUTB PWM Output for Primary Side Switch. This pin can be disabled when not in use. This signal is referenced to AGND. 13 OUTC PWM Output for Primary Side Switch. This pin can be disabled when not in use. This signal is referenced to AGND. 14 OUTD PWM Output for Primary Side Switch. This pin can be disabled when not in use. This signal is referenced to AGND. 15 SYNC Synchronization Input Signal. This pin is used as a reference for the internal PWM frequency. This signal is referenced to AGND and must have a nominal duty cycle of 50%. If this pin is not used, connect it to AGND and program Register 0xFE55[6] = 1. 16 GPIO4 Programmable General-Purpose Input/Output. If this pin is not used, connect it to AGND. This pin can also be configured as an active snubber PWM output. 17 GPIO3 Programmable General-Purpose Input/Output. If this pin is not used, connect it to AGND. This pin can also be configured as an active snubber PWM output. NOTES 1. NC = NO CONNECT. LEAVE THIS PIN UNCONNECTED. 2. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE EXPOSED PAD ON THE UNDERSIDE OF THE PACKAGE BE SOLDERED TO THE PCB AGND PLANE. 24 ISHARE 23 SMBALRT 22 SDA 21 SCL 20 CTRL 19 GPIO1 18 GPIO2 17 GPIO3 1 2 3 4 5 6 7 8 OVP VS+ VS– CS2+ CS2– NC VFF CS1 ADP1055 TOP VIEW (Not to Scale) |
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