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TS1102-25EG5 데이터시트(PDF) 5 Page - Silicon Laboratories |
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TS1102-25EG5 데이터시트(HTML) 5 Page - Silicon Laboratories |
5 / 20 page 2.3 SIGN Comparator Output As shown in the TS1101/03’s block diagram, the design of the TS1101/03 incorporated one additional feature: an analog comparator whose inputs monitor the internal amplifier’s differential output voltage. While the voltage at the TS1101/03’s OUT terminal indicates the magnitude of the load current, the TS1101/03’s SIGN output indicates the load current’s direction. The SIGN output is a logic high when M1 is conducting current (VRS+ > VRS–). Alternatively, the SIGN output is a logic low when M2 is conducting current (VRS+ < VRS–). The SIGN comparator’s transfer characteristic is illustrated in the figure below. Unlike other current-sense amplifiers that implement a OUT/ SIGN arrangement, the TS1101/03 exhibits no “dead zone” at ILOAD switchover. The other attribute of the SIGN comparator’s behavior is its propagation delay as a function of applied VSENSE [(VRS+ – VRS–) or (VRS– – VRS+)]. As shown below, the SIGN comparator’s propagation delay behavior is symmetric regardless of current-flow direction and is inversely proportional to VSENSE. Figure 2.3. SIGN Comparator Transfer Characteristic and Propagation Delay Figure 2.4. SIGN Comparator Propagation Delay vs. VSENSE TS1100/01/02/03 Data Sheet System Overview silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 4 |
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