DLPC410

DLPS024C – AUGUST 2012 – REVISED DECEMBER 2015

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Table of Contents

1

Features .................................................................. 1

10

Application and Implementation........................ 41

10.1

Application Information.......................................... 41

2

Applications ........................................................... 1

10.2

Typical Application ................................................ 41

3

Description ............................................................. 1

10.3

Initialization Setup ................................................. 43

4

Revision History..................................................... 2

11

Power Supply Recommendations ..................... 47

5

Description (continued)......................................... 4

11.1

Power Down Operation ......................................... 47

6

Device Options....................................................... 4

12

Layout................................................................... 47

7

Pin Configuration and Functions ......................... 5

12.1

Layout Guidelines ................................................. 47

8

Specifications....................................................... 19

12.2

Layout Example .................................................... 49

8.1

Absolute Maximum Ratings .................................... 19

12.3

DLPC410 Chipset Connections ........................... 50

8.2

ESD Ratings............................................................ 19

13

Device and Documentation Support ................. 58

8.3

Recommended Operating Conditions ..................... 19

13.1

Device Support...................................................... 58

8.4

Electrical Characteristics......................................... 20

13.2

Documentation Support ........................................ 59

8.5

Timing Requirements .............................................. 20

13.3

Community Resources.......................................... 59

9

Detailed Description ............................................ 22

13.4

Trademarks ........................................................... 59

9.1

Overview ................................................................. 22

13.5

Electrostatic Discharge Caution ............................ 59

9.2

Functional Block Diagrams ..................................... 22

13.6

Glossary ................................................................ 59

9.3

Feature Description................................................. 23

14

Mechanical, Packaging, and Orderable

9.4

Device Functional Modes........................................ 39

Information ........................................................... 59

9.5

Programming........................................................... 39

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (June 2013) to Revision C

Page

•

Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section ................................................................................................. 1

•

Removed references to Discovery 4100 and deleted DLPR4101 throughout document....................................................... 1

•

Added DLP7000UV and DLP9500UV to Features and Description....................................................................................... 1

•

Added note - Xlilinx System Monitor analog supply & ground - "must be connected to ground" (AVDD_0 & AVSS_0) ....... 6

•

Changed "DAD A" descriptions to "DLPA200 number 1" and "DAD B" descriptions to "DLPA200 number 2" ..................... 6

•

Reversed DDC_Bnn_VR pairs pullups / pulldowns (for nn =12, 15, and 16)) ....................................................................... 7

•

Changed Pin # C22 name from DDC_B11_VRP (duplicate) to DDC_B15_VRP ................................................................. 7

•

Added "Not used" to description for DMD_B_RESET and DMD_B_SCPEN ...................................................................... 13

•

Added TP14 and TP17 note - Xilinx Temperature Diode .................................................................................................... 13

•

Added "in Reference Design" to ECP2 Mictor pin notes ...................................................................................................... 13

•

Changed ECP2 pin description from "Not Defined" to "Not Used" ...................................................................................... 13

•

Added ECP2_M_TP[3:29] descriptions and active state...................................................................................................... 14

•

Deleted duplicate pin numbers M13 and M14 ..................................................................................................................... 15

•

Changed Description from "DMD Power" to "DMD Power Good indicator" ........................................................................ 15

•

Changed duplicate pin name from RSVD_0 to RSVD_1 ..................................................................................................... 16

•

Updated pin description for SCPDI and SCPDO ................................................................................................................. 16

•

Changed STEPVCC to connect to ground, active "Hi" to "-", and clock to "-" .................................................................... 16

•

Changed Description from "JTAG Data Clock" to "JTAG Data" .......................................................................................... 16

•

Changed pin names for VCCO_n_n pins to list each pin separately ................................................................................... 17

•

Added note about Xilinx System Monitor differential pins (VN_0 & VP_0) and reference voltage (VREFN_0 &

VREFP_0)............................................................................................................................................................................. 17

•

Changed Description from "DMD Reset Watchdog" to "DMD Mirror Clocking Pulse Watchdog" ....................................... 18

2

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