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AD7770 데이터시트(PDF) 2 Page - Analog Devices |
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AD7770 데이터시트(HTML) 2 Page - Analog Devices |
2 / 94 page AD7770 Data Sheet Rev. A | Page 2 of 94 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 3 Functional Block Diagram .............................................................. 4 Specifications..................................................................................... 5 DOUTx Timing Characterististics............................................. 9 SPI Timing Characterististics ................................................... 10 Synchronization Pins and Reset Timing Characteristics...... 11 SAR ADC Timing Characterististics ....................................... 12 GPIO SRC Update Timing Characterististics......................... 12 Absolute Maximum Ratings.......................................................... 13 Thermal Resistance .................................................................... 13 ESD Caution................................................................................ 13 Pin Configuration and Function Descriptions........................... 14 Typical Performance Characteristics ........................................... 17 Terminology .................................................................................... 30 Theory of Operation ...................................................................... 32 Analog Inputs.............................................................................. 32 Transfer Function ....................................................................... 33 Core Signal Chain....................................................................... 34 Capacitive PGA........................................................................... 34 Internal Reference and Reference Buffers............................... 34 Integrated LDOs ......................................................................... 35 Clocking and Sampling.............................................................. 35 Digital Reset and Synchronization Pins .................................. 35 Digital Filtering........................................................................... 36 Shutdown Mode.......................................................................... 36 Controlling the AD7770 ............................................................ 37 Pin Control Mode....................................................................... 37 SPI Control.................................................................................. 39 Digital SPI.................................................................................... 42 RMS Noise and Resolution............................................................ 45 High Resolution Mode............................................................... 45 Low Power Mode........................................................................ 45 Diagnostics and Monitoring ......................................................... 46 Self Diagnostics Error ................................................................ 46 Monitoring Using the AD7770 SAR ADC (SPI Control Mode)........................................................................................... 47 Σ-Δ ADC Diagnostics (SPI Control Mode)............................ 49 Σ-Δ Output Data............................................................................. 50 ADC Conversion Output—Header and Data ........................ 50 SRC (SPI Control Mode)........................................................... 51 Data Output Interface................................................................ 52 Calculating the CRC Checksum .............................................. 57 Register Summary .......................................................................... 58 Register Details ............................................................................... 62 Channel 0 Configuration Register ........................................... 62 Channel 1 Configuration Register ........................................... 62 Channel 2 Configuration Register ........................................... 63 Channel 3 Configuration Register ........................................... 63 Channel 4 Configuration Register ........................................... 64 Channel 5 Configuration Register ........................................... 64 Channel 6 Configuration Register ........................................... 65 Channel 7 Configuration Register ........................................... 65 Disable Clocks to ADC Channel Register .............................. 66 Channel 0 Sync Offset Register ................................................ 66 Channel 1 Sync Offset Register ................................................ 66 Channel 2 Sync Offset Register ................................................ 66 Channel 3 Sync Offset Register ................................................ 67 Channel 4 Sync Offset Register ................................................ 67 Channel 5 Sync Offset Register ................................................ 67 Channel 6 Sync Offset Register ................................................ 67 Channel 7 Sync Offset Register ................................................ 67 General User Configuration 1 Register................................... 68 General User Configuration 2 Register................................... 68 General User Configuration 3 Register................................... 69 Data Output Format Register ................................................... 70 Main ADC Meter and Reference Mux Control Register ...... 71 Global Diagnostics Mux Register............................................. 71 GPIO Configuration Register................................................... 72 GPIO Data Register.................................................................... 72 Buffer Configuration 1 Register............................................... 73 Buffer Configuration 2 Register............................................... 73 Channel 0 Offset Upper Byte Register..................................... 73 Channel 0 Offset Middle Byte Register................................... 73 Channel 0 Offset Lower Byte Register..................................... 74 Channel 0 Gain Upper Byte Register....................................... 74 Channel 0 Gain Middle Byte Register ..................................... 74 Channel 0 Gain Lower Byte Register....................................... 74 |
유사한 부품 번호 - AD7770 |
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유사한 설명 - AD7770 |
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