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TDA16846 데이터시트(PDF) 18 Page - Infineon Technologies AG |
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TDA16846 데이터시트(HTML) 18 Page - Infineon Technologies AG |
18 / 28 page TDA 16846 TDA 16847 Data Sheet 18 2000-01-14 Second a High Power Shutdown Comparator (FC2) is implemented: When the voltage V 6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the power measurement circuit (Pin 8) is smoothed by R 8/C6 and applied to the “high power shutdown” input at Pin 6. The relation between this voltage V 6 and the output power of the converter P is approximately: V 6 ≈ (P × LSecondary × 5V)/(VOUT 2 × C 8 × R9) L Secondary: The transformers secondary inductance V OUT: The converters output voltage So the time constant of R 9/C8 for a certain high power shutdown level PSD is: R 9 × C8 ≈ (PSD × LSecondary × 4.2)/VOUT 2 The converters high power shutdown level can be dimensioned lower (by R 9, C8) than the current limit level (see “current limiting”). So because of the delay R 8/C6, the converter can deliver maximum output power (current limit level) for a certain time (e. g. for power pulses like motor start current) and a power below the high power shutdown level for unlimited time. This has the advantage that the thermal dimensioning of the power devices is only needed for the lower power level. Once the voltage V 6 exceeds 1.2 V there are no more charge or discharge actions at Pin 8. The voltage V 6 remains high due to the bias current out of HPC and the converter remains switched-off. Reset can be done by either plug-off the supply from the mains or with a high value resistor R 6 (Figure 14). R 6 causes a reset every view seconds. When Pin 9 is not connected or gets too less current the temporary high power circuit is disabled. |
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