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FM25V02A-G 데이터시트(PDF) 10 Page - Cypress Semiconductor |
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FM25V02A-G 데이터시트(HTML) 10 Page - Cypress Semiconductor |
10 / 23 page FM25V02A Document Number: 001-90865 Rev. *F Page 10 of 23 HOLD Pin Operation The HOLD pin can be used to interrupt a serial operation without aborting it. If the bus master pulls the HOLD pin LOW while SCK is LOW, the current operation will pause. Taking the HOLD pin HIGH while SCK is LOW will resume an operation. The transitions of HOLD must occur while SCK is LOW, but the SCK and CS pin can toggle during a hold state. Sleep Mode A low-power sleep mode is implemented on the FM25V02A device. The device will enter the low-power state when the SLEEP opcode B9h is clocked-in and a rising edge of CS is applied. When in sleep mode, the SCK and SI pins are ignored and SO will be HI-Z, but the device continues to monitor the CS pin. On the next falling edge of CS, the device will return to normal operation within tREC time. The SO pin remains in a HI-Z state during the wakeup period. The device does not necessarily respond to an opcode within the wakeup period. To start the wakeup procedure, the controller may send a “dummy” read, for example, and wait the remaining tREC time. Figure 14. HOLD Operation [2] CS SCK HOLD SO SI VALID IN VALID IN Figure 15. Sleep Mode Operation CS SCK SI SO HI-Z 0 Enters Sleep Mode VALID IN t SU t REC Recovers from Sleep Mode 10 1 1 1 0 0 1 1 2 3 4 5 6 7 Note 2. Figure 14 shows the HOLD operation for input mode and output mode. |
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