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STK12C68-5SF55 데이터시트(PDF) 1 Page - List of Unclassifed Manufacturers

부품명 STK12C68-5SF55
상세설명  8K x 8 AutoStore??nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
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October 2003
1
Document Control # ML0008 rev 0.4
PIN CONFIGURATIONS
VCAP
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VCCX
HSB
A8
A9
A11
G
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
28 - LCC
28 - DIP
28 - SOIC
PIN NAMES
A0 - A12
Address Inputs
DQ0 -DQ7
Data In/Out
E
Chip Enable
W
Write Enable
G
Output Enable
HSB
Hardware Store Busy (I/O)
VCCX
Power (+ 5V)
VCAP
Capacitor
VSS
Ground
STK12C68
STK12C68-M SMD#5962-94599
8K x 8 AutoStore™nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
• 25ns, 35ns, 45ns and 55ns Access Times
• “Hands-off” Automatic STORE with External
68
µF Capacitor on Power Down
• STORE to Nonvolatile Elements Initiated by
Hardware, Software or AutoStore™ on Power
Down
• RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical I
CC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
ments (Commercial/Industrial)
• 100-Year Data Retention in Nonvolatile Ele-
ments (Commercial/Industrial)
• Commercial, Industrial and Military Tempera-
tures
• 28-Pin SOIC, DIP and LCC Packages
DESCRIPTION
The Simtek STK12C68 is a fast static RAM with a
nonvolatile element incorporated in each static
memory cell. The SRAM can be read and written an
unlimited number of times, while independent, non-
volatile data resides in Nonvolatile Elements. Data
transfers from the SRAM to the Nonvolatile Elements
(the STORE operation) can take place automatically
on power down. A 68
µF or larger capacitor tied from
V
CAP to ground guarantees the STORE operation,
regardless of power-down slew rate or loss of power
from “hot swapping”. Transfers from the Nonvolatile
Elements to the SRAM (the RECALL operation) take
place automatically on restoration of power. Initia-
tion of STORE and RECALL cycles can also be soft-
ware
controlled
by
entering
specific
read
sequences. A hardware STORE may be initiated with
the HSB pin.
BLOCK DIAGRAM
COLUMN I/O
COLUMN DEC
STATIC RAM
ARRAY
128 x 512
QUANTUM TRAP
128 x 512
STORE/
RECALL
CONTROL
STORE
RECALL
POWER
CONTROL
A5
A6
A9
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
SOFTWARE
DETECT
A0 - A12
G
E
W
A8
A7
A10
A3
A2
A0 A1
A4
VCCX
VCAP
HSB


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