전자부품 데이터시트 검색엔진 |
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CD4093BE 데이터시트(PDF) 1 Page - Texas Instruments |
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CD4093BE 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 17 page 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright 2003 Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Data sheet acquired from Harris Semiconductor SCHS115D – Revised September 2003 VOH The CD4093B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes). PACKAGE THERMAL IMPEDANCE, θJA (See Note 1): E package 80 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M package 86 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NS package 76 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOTE 1: Package thermal impedance is calculated in accordance with JESD 51-7. VDD VDD VP VN VSS VOL |
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