전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CDCVF857ZQLR 데이터시트(PDF) 7 Page - Texas Instruments

부품명 CDCVF857ZQLR
상세설명  2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
Download  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

CDCVF857ZQLR 데이터시트(HTML) 7 Page - Texas Instruments

Back Button CDCVF857ZQLR Datasheet HTML 3Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 4Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 5Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 6Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 7Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 8Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 9Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 10Page - Texas Instruments CDCVF857ZQLR Datasheet HTML 11Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 22 page
background image
www.ti.com
TIMING REQUIREMENTS
SWITCHING CHARACTERISTICS
CDCVF857
SCAS047F – MARCH 2003 – REVISED MAY 2007
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
Part-to-part input
∆C
VDDQ = 2.5 V, VI = VDDQ or GND
1
pF
capacitance variation
Input capacitance difference
CI(∆)
between CLK and CLK,
VDDQ = 2.5 V, VI = VDDQ or GND
0.25
pF
FBIN, and FBIN
over recommended ranges of supply voltage and operating free-air temperature
PARAMETER
MIN
MAX
UNIT
Operating clock frequency
60
220
fCLK
MHz
Application clock frequency
90
220
Input clock duty cycle
40%
60%
Stabilization time (PLL mode) (1)
10
µs
Stabilization time (bypass mode) (2)
30
ns
(1)
The time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal. For phase lock to be
obtained, a fixed-frequency, fixed-phase reference signal must be present at CLK and VDD must be applied. Until phase lock is obtained,
the specifications for propagation delay, skew, and jitter parameters given in the switching characteristics table are not applicable. This
parameter does not apply for input modulation under SSC application.
(2)
A recovery time is required when the device goes from power-down mode into bypass mode (AVDD at GND).
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH(1)
Low-to-high level propagation delay time
Test mode/CLK to any output
3.5
ns
tPHL(1)
High-to-low level propagation delay time
Test mode/CLK to any output
3.5
ns
100 MHz (PC1600)
–65
65
tjit(per)(2)
Jitter (period), see Figure 7
ps
133/167/200 MHz (PC2100/2700/3200)
–30
30
100 MHz (PC1600)
–50
50
tjit(cc)(2)
Jitter (cycle-to-cycle), see Figure 4
ps
133/167/200 MHz (PC2100/2700/3200)
–35
35
100 MHz (PC1600)
–100
100
tjit(hper)(2)
Half-period jitter, see Figure 8
ps
133/167/200 MHz (PC2100/2700/3200)
–75
75
tslr(o)
Output clock slew rate, see Figure 9
Load: 120
Ω, 14 pF
1
2
V/ns
t(φ)
Static phase offset, see Figure 5
100/133/167/200 MHz
–50
50
ps
tsk(o)
Output skew, see Figure 6
Load: 120
Ω, 14 pF; 100/133/167/200 MHz
40
ps
(1)
Refers to the transition of the noninverting output.
(2)
This parameter is assured by design but cannot be 100% production tested.
7
Submit Documentation Feedback


유사한 부품 번호 - CDCVF857ZQLR

제조업체부품명데이터시트상세설명
logo
Texas Instruments
CDCVF857ZQLR TI1-CDCVF857ZQLR Datasheet
1Mb / 23P
[Old version datasheet]   2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
More results

유사한 설명 - CDCVF857ZQLR

제조업체부품명데이터시트상세설명
logo
Texas Instruments
CDCVF855 TI-CDCVF855 Datasheet
241Kb / 14P
[Old version datasheet]   2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
CDCVF857 TI1-CDCVF857_17 Datasheet
1Mb / 23P
[Old version datasheet]   2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
CDCVF855 TI1-CDCVF855_16 Datasheet
793Kb / 16P
[Old version datasheet]   2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
CDCVF2505-Q1 TI1-CDCVF2505-Q1 Datasheet
225Kb / 10P
[Old version datasheet]   3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER
logo
Pericom Semiconductor C...
PI6C2502 PERICOM-PI6C2502 Datasheet
371Kb / 6P
   Phase-Locked Loop Clock Driver
PI6C2302 PERICOM-PI6C2302 Datasheet
279Kb / 4P
   Phase-Locked Loop Clock Driver
PI6C2501A PERICOM-PI6C2501A Datasheet
50Kb / 4P
   Phase-Locked Loop Clock Driver
PI6C2502A PERICOM-PI6C2502A Datasheet
276Kb / 4P
   Phase-Locked Loop Clock Driver
PI6C2501 PERICOM-PI6C2501 Datasheet
235Kb / 4P
   Phase-Locked Loop Clock Driver
PI6C2401 PERICOM-PI6C2401 Datasheet
71Kb / 4P
   Phase-Locked Loop Clock Driver
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com