 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AD9882KST-100 데이터시트(PDF) 2 Page - Analog Devices |
|
||||||||||||||||||||||||||||||
AD9882KST-100 데이터시트(HTML) 2 Page - Analog Devices |
|
|
2 / 36 page  REV. A AD9882–SPECIFICATIONS –2– ANALOG INTERFACE ELECTRICAL CHARACTERISTICS Test AD9882KST-100 AD9882KST-140 Parameter Temp Level Min Typ Max Min Typ Max Unit RESOLUTION 8 8 Bits DC ACCURACY Differential Nonlinearity 25 ∞CI ±0.5 +1.25/–1.0 ±0.5 +1.35/–1.0 LSB Full VI +1.35/–1.0 +1.45/–1.0 LSB Integral Nonlinearity 25 ∞CI ±0.5 ±1.85 ±0.5 ±2.0 LSB Full VI ±2.0 ±2.3 LSB No Missing Codes Full VI Guaranteed Guaranteed ANALOG INPUT Input Voltage Range Minimum Full VI 0.5 0.5 V p-p Maximum Full VI 1.0 1.0 V p-p Gain Tempco 25 ∞CV 100 100 ppm/ ∞C Input Bias Current Full IV 1 1 mA Input Full-Scale Matching Full VI 1.5 8.0 1.5 8.0 % FS Offset Adjustment Range Full VI 46 49 56 46 49 56 % FS REFERENCE OUTPUT Output Voltage Full VI 1.20 1.25 1.32 1.20 1.25 1.32 V Temperature Coefficient Full V ±50 ±50 ppm/ ∞C SWITCHING PERFORMANCE 1 Maximum Conversion Rate Full VI 100 140 MSPS Minimum Conversion Rate Full IV 10 10 MSPS Data to Clock Skew Full IV –0.5 +2.0 –0.5 +2.0 ns Serial Port Timing tBUFF Full VI 4.7 4.7 ms tSTAH Full VI 4.0 4.0 ms tDHO Full VI 0 0 ms tDAL Full VI 4.7 4.7 ms tDAH Full VI 4.0 4.0 ms tDSU Full VI 250 250 ns tSTASU Full VI 4.7 4.7 ms tSTOSU Full VI 4.0 4.0 ms Hsync Input Frequency Full IV 15 110 15 110 kHz Maximum PLL Clock Rate Full VI 100 140 MHz Minimum PLL Clock Rate Full IV 12 12 MHz PLL Jitter 25 ∞CIV 500 700 2 500 700 2 ps p-p Full IV 1000 2 1000 2 ps p-p Sampling Phase Tempco Full IV 15 15 ps/ ∞C DIGITAL INPUTS Input Voltage, High (VIH) Full VI 2.6 2.6 V Input Voltage, Low (VIL) Full VI 0.8 0.8 V Input Current, High (IIH) Full IV –1.0 –1.0 mA Input Current, Low (IIL) Full IV +1.0 +1.0 mA Input Capacitance 25 ∞CV 3 3 pF DIGITAL OUTPUTS 1 Output Voltage, High (VOH) Full IV VDD – 0.1 VDD – 0.1 V Output Voltage, Low (VOL) Full IV 0.4 0.4 V Duty Cycle, DATACK Full IV 45 50 55 45 50 55 % Output Coding Binary Binary (VD = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate, unless otherwise noted.) |
유사한 부품 번호 - AD9882KST-100 |
|
유사한 설명 - AD9882KST-100 |
|
|
링크 URL |
| 개인정보취급방침 |
| ALLDATASHEET.CO.KR |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
