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LM124AJRLQMLV 데이터시트(PDF) 6 Page - Texas Instruments

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부품명 LM124AJRLQMLV
상세설명  Low Power Quad Operational Amplifiers
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LM124AQML, LM124QML
SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013
www.ti.com
LM124/883 Electrical Characteristics SMD: 77043 DC Parameters
(The following conditions apply to all the following parameters, unless otherwise specified.)
All voltages referenced to device ground.
Sub-
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Groups
V+ = 5V
1.2
mA
1, 2, 3
ICC
Power Supply Current
3.0
mA
1
V+ = 30V
4.0
mA
2, 3
V+ = 15V, VOUT = 200mV,
12
uA
1
+VIN = 0mV, -VIN = +65mV
ISINK
Output Sink Current
V+ = 15V, VOUT = 2V,
10
mA
1
+VIN = 0mV, -VIN = +65mV
5
mA
2, 3
V+ = 15V, VOUT = 2V,
-20
mA
1
ISOURCE
Output Source Current
+VIN = 0mV, -VIN = -65mV
-10
mA
2, 3
IOS
Short Circuit Current
V+ = 5V, VOUT = 0V
-60
mA
1
-5
5
mV
1
V+ = 30V, VCM = 0V
-7
7
mV
2, 3
-5
5
mV
1
V+ = 30V, VCM = 28V
VIO
Input Offset Voltage
-7
7
mV
2, 3
-5
5
mV
1
V+ = 5V, VCM = 0V
-7
7
mV
2, 3
V+ = 30V, VCM = 28.5V
-5
5
mV
1
Common Mode
CMRR
V+ = 30V, VIN = 0V to 28.5V
(1)
70
dB
1
Rejection Ratio
-150
10
nA
1
+IIB
Input Bias Current
V+ = 5V, VCM = 0V
(2)
-300
10
nA
2, 3
-30
30
nA
1
IIO
Input Offset Current
V+ = 5V, VCM = 0V
-100
100
nA
2, 3
PSRR
Power Supply Rejection V+ = 5V to 30V, VCM = 0V
65
dB
1
Ratio
(3)
28.5
V
1
Common Mode Voltage
VCM
V+ = 30V
(1)
Range
28
V
2, 3
V+ = 15V, RL = 2K Ω,
50
V/mV
4
AVS
Large Signal Gain
VO = 1V to 11V
25
V/mV
5, 6
V+ = 30V, RL = 2K Ω
26
V
4, 5, 6
VOH
Output Voltage High
V+ = 30V, RL = 10K Ω
27
V
4, 5, 6
V+ = 30V, RL = 10K Ω
40
mV
4, 5, 6
40
mV
4
VOL
Output Voltage Low
V+ = 30V, ISINK = 1uA
100
mV
5, 6
V+ = 5V, RL= 10K Ω
20
mV
4, 5, 6
Channel Separation
(4)
1KHz, 20KHz
80
dB
4
(Amp to Amp Coupling)
(5)
(1)
The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The
upper end of the common-mode voltage range is V+
−1.5V (at 25°C), but either or both inputs can go to +32V without damage
independent of the magnitude of V+.
(2)
The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the input lines.
(3)
Specified by VIO tests.
(4)
Ensured, not tested
(5)
Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This
typically can be detected as this type of capacitance increases at higher frequencies.
6
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