전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

SN74ABT8996DW 데이터시트(PDF) 1 Page - Texas Instruments

Click here to check the latest version.
부품명 SN74ABT8996DW
상세설명  10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
Download  46 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

SN74ABT8996DW 데이터시트(HTML) 1 Page - Texas Instruments

  SN74ABT8996DW Datasheet HTML 1Page - Texas Instruments SN74ABT8996DW Datasheet HTML 2Page - Texas Instruments SN74ABT8996DW Datasheet HTML 3Page - Texas Instruments SN74ABT8996DW Datasheet HTML 4Page - Texas Instruments SN74ABT8996DW Datasheet HTML 5Page - Texas Instruments SN74ABT8996DW Datasheet HTML 6Page - Texas Instruments SN74ABT8996DW Datasheet HTML 7Page - Texas Instruments SN74ABT8996DW Datasheet HTML 8Page - Texas Instruments SN74ABT8996DW Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 46 page
background image
SN54ABT8996, SN74ABT8996
10-BIT ADDRESSABLE SCAN PORTS
MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SCBS489C – AUGUST 1994 – REVISED APRIL 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Members of Texas Instruments Broad
Family of Testability Products Supporting
IEEE Std 1149.1-1990 (JTAG) Test Access
Port (TAP) and Boundary-Scan Architecture
D Extend Scan Access From Board Level to
Higher Levels of System Integration
D Promote Reuse of Lower-Level
(Chip/Board) Tests in System Environment
D Switch-Based Architecture Allows Direct
Connect of Primary TAP to Secondary TAP
D Primary TAP Is Multidrop for Minimal Use of
Backplane Wiring Channels
D Simple Addressing (Shadow) Protocol Is
Received/Acknowledged on Primary TAP
D Shadow Protocols Can Occur in Any of
Test-Logic-Reset, Run-Test/Idle, Pause-DR,
and Pause-IR TAP States to Provide for
Board-to-Board Test and Built-In Self-Test
D 10-Bit Address Space Provides for Up to
1021 User-Specified Board Addresses
D Bypass (BYP) Pin Forces
Primary-to-Secondary Connection Without
Use of Shadow Protocols
D Connect (CON) Pin Provides Indication of
Primary-to-Secondary Connection
D High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Support Backplane Interface at Primary and
High Fanout at Secondary
D Package Options Include Plastic Small-
Outline (DW) and Thin Shrink Small-
Outline (PW) Packages, Ceramic Chip
Carriers (FK), and Ceramic DIPs (JT)
description
The ’ABT8996 10-bit addressable scan ports (ASP) are members of the Texas Instruments (TI
™) SCOPE™
testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan
to facilitate testing of complex circuit assemblies. Unlike most SCOPE
™ devices, the ASP is not a
boundary-scannable device, rather, it applies TI’s addressable-shadow-port technology to the IEEE Standard
1149.1-1990 (JTAG) test access port (TAP) to extend scan access beyond the board level.
Conceptually, the ASP is a simple switch that can be used to directly connect a set of multidrop primary TAP
signals to a set of secondary TAP signals – for example, to interface backplane TAP signals to a board-level
TAP. The ASP provides all signal buffering that might be required at these two interfaces. When primary and
secondary TAPs are connected, only a moderate propagation delay is introduced – no storage/retiming
elements are inserted. This minimizes the need for reformatting board-level test vectors for in-system use.
Copyright
© 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SCOPE is a trademark of Texas Instruments Incorporated.
17
SN54ABT8996 . . . JT PACKAGE
SN74ABT8996 . . . DW OR PW PACKAGE
(TOP VIEW)
5
6
7
8
9
10
11
25
24
23
22
21
20
19
43
2
1 28
12 13 14 15 16
A8
A9
VCC
NC
CON
STDI
STCK
A1
A0
BYP
NC
GND
PTDO
PTCK
SN54ABT8996 . . . FK PACKAGE
(TOP VIEW)
18
27 26
A4
A3
A2
A1
A0
BYP
GND
PTDO
PTCK
PTMS
PTDI
PTRST
A5
A6
A7
A8
A9
VCC
CON
STDI
STCK
STMS
STDO
STRST
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
NC – No internal connection


유사한 부품 번호 - SN74ABT8996DW

제조업체부품명데이터시트상세설명
logo
Texas Instruments
SN74ABT8996DW TI-SN74ABT8996DW Datasheet
564Kb / 40P
[Old version datasheet]   10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
More results

유사한 설명 - SN74ABT8996DW

제조업체부품명데이터시트상세설명
logo
Texas Instruments
SN54ABT8996 TI-SN54ABT8996 Datasheet
564Kb / 40P
[Old version datasheet]   10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
SN54LVT8996 TI-SN54LVT8996_99 Datasheet
603Kb / 41P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN54LVT8996 TI-SN54LVT8996 Datasheet
717Kb / 44P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
SN74LVT8986 TI-SN74LVT8986 Datasheet
880Kb / 47P
[Old version datasheet]   3.3-V LINKING ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN74LVT8986 TI-SN74LVT8986_07 Datasheet
885Kb / 54P
[Old version datasheet]   3.3-V LINKING ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN74LVT8996-EP TI1-SN74LVT8996-EP Datasheet
764Kb / 42P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORT MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (KTAG) TAP TRANSCEIVER
logo
National Semiconductor ...
SCANSTA111 NSC-SCANSTA111 Datasheet
524Kb / 29P
   Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA111 NSC-SCANSTA111_05 Datasheet
911Kb / 31P
   Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
logo
Texas Instruments
SCANSTA111 TI1-SCANSTA111 Datasheet
1Mb / 38P
[Old version datasheet]   SCANSTA111 Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
logo
Xilinx, Inc
XQ18V04 XILINX-XQ18V04_03 Datasheet
155Kb / 15P
   IEEE Std 1149.1 boundary-scan (JTAG) support
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com