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SN74AC534DW 데이터시트(PDF) 1 Page - Texas Instruments |
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SN74AC534DW 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 18 page SN54AC534, SN74AC534 OCTAL EDGETRIGGERED DTYPE FLIPFLOPS WITH 3STATE OUTPUTS SCAS554D − NOVEMBER 1995 − REVISED OCTOBER 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 11 ns at 5 V D 3-State Inverting Outputs Drive Bus Lines Directly D Full Parallel Access for Loading description/ordering information These octal edge-triggered D-type flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the complements of the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube SN74AC534N SN74AC534N SOIC − DW Tube SN74AC534DW AC534 SOIC − DW Tape and reel SN74AC534DWR AC534 −40 °C to 85°C SOP − NS Tape and reel SN74AC534NSR AC534 −40 C to 85 C SSOP − DB Tape and reel SN74AC534DBR AC534 TSSOP − PW Tube SN74AC534PW AC534 TSSOP − PW Tape and reel SN74AC534PWR AC534 CDIP − J Tube SNJ54AC534J SNJ54AC534J −55 °C to 125°C CFP − W Tube SNJ54AC534W SNJ54AC534W −55 C to 125 C LCCC − FK Tube SNJ54AC534FK SNJ54AC534FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK SN54AC534 ...J OR W PACKAGE SN74AC534 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 32 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 8D 7D 7Q 6Q 6D 2D 2Q 3Q 3D 4D SN54AC534...FK PACKAGE (TOP VIEW) |
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