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SN74HCT126N 데이터시트(PDF) 4 Page - Texas Instruments |
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SN74HCT126N 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 5 page SN54HCT126, SN74HCT126 QUADRUPLE BUS BUFFER GATES WITH 3STATE OUTPUTS SCLS070A − NOVEMBER 1988 − REVISED NOVEMBER 1990 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V 10% 3 V ≈ VCC VOL 0 V Input (See Note B) Output (See Note C) 1.3 V tPZL tPLZ VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOH ≈ 0 V 1.3 V 1.3 V tPZH tPHZ Output (See Note C) From Output Under Test RL VCC S1 S2 LOAD CIRCUIT PARAMETER CL tPZH tpd or tt tdis ten tPZL tPHZ tPLZ 1 k Ω 1 k Ω 50 pF or 150 pF 50 pF Open Closed RL S1 Closed Open S2 Open Closed Closed Open 50 pF or 150 pF Open Open −− NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one input transition per measurement. CL (see Note A) 1.3 V 1.3 V 1.3 V 3 V VOH VOL 0 V tr tf Input Output 1.3 V tPLH tPHL 90% Figure 1. Load Circuit and Voltage Waveforms |
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