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CAP1203-1-AC3-TR 데이터시트(PDF) 11 Page - Microchip Technology

부품명 CAP1203-1-AC3-TR
상세설명  3-Channel Capacitive Touch Sensor
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

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 2013-2015 Microchip Technology Inc.
DS00001572B-page 11
3.3.3
SMBUS SEND BYTE
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is
transferred during the Send Byte protocol as shown in Table 3-4.
APPLICATION NOTE: The Send Byte protocol is not functional in Deep Sleep (i.e., DSLEEP bit is set).
3.3.4
SMBUS RECEIVE BYTE
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to
be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in
Table 3-5.
APPLICATION NOTE: The Receive Byte protocol is not functional in Deep Sleep (i.e., DSLEEP bit is set).
3.4
I2C Protocols
The CAP1203 supports I2C Block Read and Block Write.
The protocols listed below use the convention in Table 3-1.
3.4.1
BLOCK READ
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in Table 3-6.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
TABLE 3-3:
READ BYTE PROTOCOL
Start
Slave Address
WR
ACK
Register
Address
ACK
Start
Client Address
RD
ACK
Register
Data
NACK
Stop
1->0
0101_000
0
0
XXh
0
1 ->0
0101_000
1
0
XXh
1
0 -> 1
TABLE 3-4:
SEND BYTE PROTOCOL
Start
Slave Address
WR
ACK
Register Address
ACK
Stop
1 -> 0
0101_000
0
0
XXh
0
0 -> 1
TABLE 3-5:
RECEIVE BYTE PROTOCOL
Start
Slave Address
RD
ACK
Register Data
NACK
Stop
1 -> 0
0101_000
1
0
XXh
1
0 -> 1
TABLE 3-6:
BLOCK READ PROTOCOL
Start
Slave
Address
WR
ACK
Register
Address
ACK
Start
Slave Address
RD
ACK
Register Data
1->0
0101_000
0
0
XXh
0
1 ->0
0101_000
1
0
XXh
ACK
REGISTER
DATA
ACK
REGISTER
DATA
ACK
REGISTER
DATA
ACK
. . .
REGISTER
DATA
NACK
STOP


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