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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TP3404 데이터시트(PDF) 2 Page - Texas Instruments |
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TP3404 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 19 page  NRND TP3404 SNOS703 – DECEMBER 2004 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) VDDA/VDDD to GNDA/GNDD 7V Voltage at Any Li, Lo Pin VCC + 1V to GND − 1V Current at Any Lo ±100 mA Voltage at Any Digital Input VCC + 1V to GND − 1V Current at Any Digital Output ±50 mA Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec.) 300°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. ELECTRICAL CHARACTERISTICS Unless otherwise specified, limits printed in BOLD characters are specified for VCCA = VCCD = 5V ±5%, TA = 0°C to +70°C. Typical characteristics are specified at VDDA = VDDD = 5.0V, TA = 25°C. All signals are referenced to GND, which is the common of GNDA and GNDD Symbol Parameter Conditions Min Typ Max Units DIGITAL INTERFACES VIH Input High Voltage All Digital Inputs (DC) 2 V VIL Input Low Voltage All Digital Inputs (DC) 0.8 V VOH Output High Voltage IL = +1 mA 2.4 V VOL Output Low Voltage IL = −1 mA 0.4 V IIL Input Low Current All Digital Input, GND < VIN < VIL −10 10 μA IIH Input High Current All Digital Input, VIH < VIN < VCC −10 10 μA IOZ Output Current in High Impedance (TRl-STATE) BO, CO, and DO −10 10 μA LINE INTERFACES RLi Input Resistance 0V < VLi < VCC 20 k Ω CLLo Load Capacitance From Lo to GND 200 pF ROLS Output Resistance Load = 60 Ω in Series with 2 μF to GND 3 Ω VDC Mean DC Voltage at Lo Load = 200 Ω in Series with 2 μF to GND 1.75 2.25 V Voltage at LS+, LS − POWER DISSIPATION ICC0 Power Down Current BCLK = 0 Hz; MCLK = 0 Hz, CCLK = 0 Hz 10 mA ICC1 Power Up Current All 4 Channels Activated 75 mA TRANSMISSION PERFORMANCE Transmit Pulse Amplitude at Lo RL = 200Ω in Series with 2 μF to GND 1.1 1.3 1.5 Vpk Input Pulse Amplitude at Li ±60 mVpk TIMING SPECIFICATIONS Symbol Parameter Conditions Min Typ Max Units MASTER CLOCK INPUT SPECIFICATIONS fMCLK Frequency of MCLK 4.096 MHz Master Clock Tolerance Relative 2X MCLK in Slave −100 +100 ppm tWMH Period of MCLK High Measured from VIH to VIH 70 ns tWML Period of MCLK Low Measured from VIL to VIL 70 ns tRM Rise Time of MCLK Measured from VIL to VIH 15 ns tFM Fall Time of MCLK Measured from VIH to VIL 15 ns 2 Submit Documentation Feedback Copyright © 2004, Texas Instruments Incorporated Product Folder Links: TP3404 |
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유사한 설명 - TP3404_14 |
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